Re: [PATCH v4 1/3] dt-bindings: dmaengine: Document qcom,gpi dma binding

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 12-10-20, 13:57, Rob Herring wrote:
> On Thu, Oct 08, 2020 at 06:01:49PM +0530, Vinod Koul wrote:
> > Add devicetree binding documentation for GPI DMA controller
> > implemented on Qualcomm SoCs
> > 
> > Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> > ---
> >  .../devicetree/bindings/dma/qcom,gpi.yaml     | 86 +++++++++++++++++++
> >  include/dt-bindings/dma/qcom-gpi.h            | 11 +++
> >  2 files changed, 97 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/dma/qcom,gpi.yaml
> >  create mode 100644 include/dt-bindings/dma/qcom-gpi.h
> > 
> > diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
> > new file mode 100644
> > index 000000000000..4470c1b2fd6c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
> > @@ -0,0 +1,86 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Technologies Inc GPI DMA controller
> > +
> > +maintainers:
> > +  - Vinod Koul <vkoul@xxxxxxxxxx>
> > +
> > +description: |
> > +  QCOM GPI DMA controller provides DMA capabilities for
> > +  peripheral buses such as I2C, UART, and SPI.
> > +
> > +allOf:
> > +  - $ref: "dma-controller.yaml#"
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - qcom,sdm845-gpi-dma
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    description:
> > +      Interrupt lines for each GPI instance
> > +    maxItems: 13
> > +
> > +  "#dma-cells":
> > +    const: 3
> > +    description: >
> > +      DMA clients must use the format described in dma.txt, giving a phandle
> > +      to the DMA controller plus the following 3 integer cells:
> > +      - channel: if set to 0xffffffff, any available channel will be allocated
> > +        for the client. Otherwise, the exact channel specified will be used.
> > +      - seid: serial id of the client as defined in the SoC documentation.
> > +      - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
> > +
> > +  iommus:
> > +    maxItems: 1
> > +
> > +  dma-channels:
> > +    maximum: 31
> > +
> > +  dma-channel-mask:
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - "#dma-cells"
> > +  - iommus
> > +  - dma-channels
> > +  - dma-channel-mask
> 
> additionalProperties: false
> 
> With that,
> 
> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>

Thanks will update while applying ... after merge window

-- 
~Vinod



[Index of Archives]     [Linux ARM Kernel]     [Linux ARM]     [Linux Omap]     [Fedora ARM]     [Linux for Sparc]     [IETF Annouce]     [Security]     [Bugtraq]     [Linux MIPS]     [ECOS]     [Asterisk Internet PBX]     [Linux API]

  Powered by Linux