Enable IOMMUs configuration for QUP nodes to stop SM8250 boards from
rebooting when using I2C DMA transfers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 889d11725c5d..ec6cfaaaa971 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -468,6 +468,7 @@ qupv3_id_2: geniqup@8c0000 {
<&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
#address-cells = <2>;
#size-cells = <2>;
+ iommus = <&apps_smmu 0x63 0x0>;
ranges;
status = "disabled";
@@ -674,6 +675,7 @@ qupv3_id_0: geniqup@9c0000 {
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
#address-cells = <2>;
#size-cells = <2>;
+ iommus = <&apps_smmu 0x5a3 0x0>;
ranges;
status = "disabled";
@@ -936,6 +938,7 @@ qupv3_id_1: geniqup@ac0000 {
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
#address-cells = <2>;
#size-cells = <2>;
+ iommus = <&apps_smmu 0x43 0x0>;
ranges;
status = "disabled";
--
2.28.0
