Hi Rob, On 29-09-20, 13:44, Rob Herring wrote: > > +description: | > > + QCOM GPI DMA controller provides DMA capabilities for > > + peripheral buses such as I2C, UART, and SPI. > > + > > +allOf: > > + - $ref: "dma-controller.yaml#" > > + > > +properties: > > + compatible: > > + enum: > > + - qcom,gpi-dma > > Should be SoC specific. Okay, will add > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + description: > > + Interrupt lines for each GPII instance > > GPII or GPI? Hw uses GPII as "GPI Instance" :) so will update this > > + maxItems: 13 > > + > > + "#dma-cells": > > + const: 3 > > + description: > > > + DMA clients must use the format described in dma.txt, giving a phandle > > + to the DMA controller plus the following 3 integer cells: > > + - channel: if set to 0xffffffff, any available channel will be allocated > > + for the client. Otherwise, the exact channel specified will be used. > > + - seid: serial id of the client as defined in the SoC documentation. > > + - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h > > + > > + iommus: > > + maxItems: 1 > > + > > + dma-channels: > > + maxItems: 1 > > Not an array. Is there a maximum number of channels or 2^32 is valid? I have not seen any max limit put, but we can be assured that it will not go to 2^32, we can put a reasonable limit .. Will add maximum :) > > + > > + dma-channel-mask: > > + maxItems: 1 > > So up to 32 channels? yep! -- ~Vinod
