On Sat, Sep 26, 2020 at 02:51:40PM +0200, kholk11@xxxxxxxxx wrote: > From: AngeloGioacchino Del Regno <kholk11@xxxxxxxxx> > > The PC_DBG_ECO_CNTL register on the Adreno A5xx family gets > programmed to some different values on a per-model basis. > At least, this is what we intend to do here; > > Unfortunately, though, this register is being overwritten with a > static magic number, right after applying the GPU-specific > configuration (including the GPU-specific quirks) and that is > effectively nullifying the efforts. > > Let's remove the redundant and wrong write to the PC_DBG_ECO_CNTL > register in order to retain the wanted configuration for the > target GPU. This was probably inherited from downstream which doesn't mind RMWing the same register multiple times. Reviewed-by: Jordan Crouse <jcrouse@xxxxxxxxxxxxxx> > Signed-off-by: AngeloGioacchino Del Regno <kholk11@xxxxxxxxx> > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > index 91726da82ed6..6262603e6e2e 100644 > --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c > @@ -594,8 +594,6 @@ static int a5xx_hw_init(struct msm_gpu *gpu) > if (adreno_gpu->info->quirks & ADRENO_QUIRK_TWO_PASS_USE_WFI) > gpu_rmw(gpu, REG_A5XX_PC_DBG_ECO_CNTL, 0, (1 << 8)); > > - gpu_write(gpu, REG_A5XX_PC_DBG_ECO_CNTL, 0xc0200100); > - > /* Enable USE_RETENTION_FLOPS */ > gpu_write(gpu, REG_A5XX_CP_CHICKEN_DBG, 0x02000000); > > -- > 2.28.0 > -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
