On Tue 28 Jul 12:08 CDT 2020, Krzysztof Kozlowski wrote: > Fix W=1 compile warnings (invalid kerneldoc): > > drivers/iommu/amd/init.c:1586: warning: Function parameter or member 'ivrs' not described in 'get_highest_supported_ivhd_type' > drivers/iommu/amd/init.c:1938: warning: Function parameter or member 'iommu' not described in 'iommu_update_intcapxt' > Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx> > --- > drivers/iommu/amd/init.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c > index 958050c213f9..4a37169b1b1b 100644 > --- a/drivers/iommu/amd/init.c > +++ b/drivers/iommu/amd/init.c > @@ -1578,7 +1578,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) > > /** > * get_highest_supported_ivhd_type - Look up the appropriate IVHD type > - * @ivrs Pointer to the IVRS header > + * @ivrs: Pointer to the IVRS header > * > * This function search through all IVDB of the maximum supported IVHD > */ > @@ -1929,7 +1929,7 @@ static int iommu_setup_msi(struct amd_iommu *iommu) > #define XT_INT_VEC(x) (((x) & 0xFFULL) << 32) > #define XT_INT_DEST_HI(x) ((((x) >> 24) & 0xFFULL) << 56) > > -/** > +/* > * Setup the IntCapXT registers with interrupt routing information > * based on the PCI MSI capability block registers, accessed via > * MMIO MSI address low/hi and MSI data registers. > -- > 2.17.1 >
