On 16:17-20200819, Rob Herring wrote:
> While bracketing doesn't matter for a DTB, the DT schema checks rely on
[..]
> ---
> SoC maintainers, please apply this directly.
[...]
> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> index 9edfae5944f7..2c762e725d89 100644
> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
> @@ -678,8 +678,8 @@ pcie0_rc: pcie@5500000 {
> power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
> #address-cells = <3>;
> #size-cells = <2>;
> - ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000
> - 0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
> + ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000>,
> + <0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
> ti,syscon-pcie-id = <&pcie_devid>;
> ti,syscon-pcie-mode = <&pcie0_mode>;
> bus-range = <0x0 0xff>;
> @@ -710,8 +710,8 @@ pcie1_rc: pcie@5600000 {
> power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
> #address-cells = <3>;
> #size-cells = <2>;
> - ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000
> - 0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
> + ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000>,
> + <0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
> ti,syscon-pcie-id = <&pcie_devid>;
> ti,syscon-pcie-mode = <&pcie1_mode>;
> bus-range = <0x0 0xff>;
For the TI chunk:
Acked-by: Nishanth Menon <nm@xxxxxx>
--
Regards,
Nishanth Menon
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