Hi,
On 8/12/2020 3:01 AM, Stephen Boyd wrote:
Quoting Maulik Shah (2020-08-10 04:21:00)
Clear previous kernel's configuration during init by resetting
interrupts in enable bank to zero.
Can you please add some more information here about why we're not
clearing all the pdc irqs and only the ones that are listed in DT?
sure.
Is
that because the pdc is shared between exception levels of the CPU and
so some irqs shouldn't be used? Does the DT binding need to change to
only list the hwirqs that are usable by the OS instead of the ones that
are usable for the entire system? The binding doesn't mention this at
all so I am just guessing here.
The IRQs specified in qcom,pdc-ranges property in DT are the only ones
that can be used in the current OS for the PDC.
So instead of setting entire register to zero (each reg supports 32
interrupts enable bit) only clearing the ones that can be used.
Thanks,
Maulik
Suggested-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
Signed-off-by: Maulik Shah <mkshah@xxxxxxxxxxxxxx>
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