On Fri, Jun 19, 2020 at 05:23:56PM -0700, Stephen Boyd wrote: > Quoting Loic Poulain (2020-06-04 03:35:24) > > From: Ilia Lin <ilialin@xxxxxxxxxxxxxx> > > > > The driver provides kernel level API for other drivers > > to access the MSM8996 L2 cache registers. > > Separating the L2 access code from the PMU driver and > > making it public to allow other drivers use it. > > The accesses must be separated with a single spinlock, > > maintained in this driver. > > > > Signed-off-by: Ilia Lin <ilialin@xxxxxxxxxxxxxx> > > Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxx> > > --- > > This needs an ack from perf maintainers. Leaving the rest of the patch > intact to help provide context. Looks fine to me: Acked-by: Will Deacon <will@xxxxxxxxxx> (I can't get my head round the MSR; ISB; spin_unlock() ordering, but this is just moving code so I don't want to open that box of fun here). Will
