Hi,
On Thu, Jun 25, 2020 at 3:31 AM Sai Prakash Ranjan
<saiprakash.ranjan@xxxxxxxxxxxxxx> wrote:
>
> QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on
> Cortex-A55 and are SSB safe, hence add them to SSB
> safelist -> arm64_ssb_cpus[].
>
> Reported-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
> ---
> arch/arm64/kernel/cpu_errata.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> index ad06d6802d2e..cf50c53e9357 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -460,6 +460,8 @@ static const struct midr_range arm64_ssb_cpus[] = {
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
> MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
> + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER),
> + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER),
Reviewed-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
