On Tue, Jun 09, 2020 at 11:26:31AM +0530, Akash Asthana wrote: > Get the interconnect paths for SPI based Serial Engine device > and vote according to the current bus speed of the driver. > > Signed-off-by: Akash Asthana <akashast@xxxxxxxxxxxxxx> > Reviewed-by: Matthias Kaehlcke <mka@xxxxxxxxxxxx> > --- I've repeatedly acked this patch but my ack never seems to get carried forward :( > + /* Set the bus quota to a reasonable value for register access */ > + mas->se.icc_paths[GENI_TO_CORE].avg_bw = Bps_to_icc(CORE_2X_50_MHZ); > + mas->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW; Why are these asymmetric?
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