Wow, thank you for the near immediate response. I'm am quite impressed.
On 5/14/2020 8:12 AM, Greg KH wrote:
On Thu, May 14, 2020 at 08:07:41AM -0600, Jeffrey Hugo wrote:
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */
+#include <linux/cdev.h>
+#include <linux/idr.h>
+#include <linux/list.h>
+#include <linux/kref.h>
+#include <linux/mhi.h>
#include <linux/module.h>
#include <linux/msi.h>
+#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
@@ -13,9 +19,242 @@
#define PCI_DEV_AIC100 0xa100
#define QAIC_NAME "Qualcomm Cloud AI 100"
+#define QAIC_MAX_MINORS 256
Why have a max?
Why not just use a misc device so you make the logic a lot simple, no
class or chardev logic to mess with at all.
It was our understanding that the preference is not to add new misc
devices. As I go and try to find a supporting reference for that, I
cannot find one, so I'm not entirely sure where that idea came from.
In addition, we see that the Habana Labs driver also uses chardev, and
has chosen the same max. We assumed that since their driver is already
accepted, using the same mechanisms where applicable would be the
preferred approach.
Specific to the max, 256 was chosen as being a factor larger than the
largest system we have, therefore we figured it wouldn't be hit for a
long while even as we try to have a look at what might happen down the
road. Looking at the Habana code, it looks like they have the same
value for much of the same reasons, although their usecases may vary
from ours somewhat.
At this time, I don't think we have a strong requirement for a chardev,
so we could investigate a switch over to a misc dev if you would prefer
that over following the Habana Labs precedent. All I ask is a
confirmation that is the approach you would like to see going forward
after reviewing the above.
--
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
