Re: [PATCH V5 4/7] spi: spi-geni-qcom: Add interconnect support

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Hi Matthias,

....

;
+ ret = geni_icc_get(&mas->se, NULL);
+	if (ret)
+		goto spi_geni_probe_runtime_disable;
+	/* Set the bus quota to a reasonable value for register access */
+	geni_icc_bw_init(&mas->se.icc_paths[GENI_TO_CORE],
+			Bps_to_icc(CORE_2X_50_MHZ), 0);
+	geni_icc_bw_init(&mas->se.icc_paths[CPU_TO_GENI], GENI_DEFAULT_BW, 0);
+
+	/* Set BW for register access */
This comment doesn't add any value. Register access is mentioned a few lines
above and from the function name it's evident that it sets the ICC bandwidth.
ok

+	ret = geni_icc_set_bw(&mas->se);

+		return ret;
return geni_se_resources_on(&mas->se);
  }
Reviewed-by: Matthias Kaehlcke <mka@xxxxxxxxxxxx>

--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project



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