Re: [PATCH] coresight: replicator: Reset replicator if context is lost

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Hi Mathieu,

On 2020-05-11 21:49, Mathieu Poirier wrote:
Hi Sai,

On Mon, 11 May 2020 at 02:34, Sai Prakash Ranjan
<saiprakash.ranjan@xxxxxxxxxxxxxx> wrote:

On some QCOM SoCs, replicators in Always-On domain loses its
context as soon as the clock is disabled. Currently as a part
of pm_runtime workqueue, clock is disabled after the replicator
is initialized by amba_pm_runtime_suspend assuming that context
is not lost which is not true for replicators with such
limitations. Hence check the replicator idfilter registers
in dynamic_replicator_enable() and reset again.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
---

More info here - https://lore.kernel.org/patchwork/patch/1231182/

---
 drivers/hwtracing/coresight/coresight-replicator.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c
index e7dc1c31d20d..11df63f51071 100644
--- a/drivers/hwtracing/coresight/coresight-replicator.c
+++ b/drivers/hwtracing/coresight/coresight-replicator.c
@@ -68,6 +68,17 @@ static int dynamic_replicator_enable(struct replicator_drvdata *drvdata,
        int rc = 0;
        u32 reg;

+       /*
+ * On some QCOM SoCs with replicators in Always-On domain, disabling + * clock will result in replicator losing its context. Currently + * as a part of pm_runtime workqueue, amba_pm_runtime_suspend disables + * clock assuming the context is not lost which is not true for cases
+        * with hardware limitations as the above.
+        */
+ if ((readl_relaxed(drvdata->base + REPLICATOR_IDFILTER0) == 0) && + (readl_relaxed(drvdata->base + REPLICATOR_IDFILTER1) == 0))
+               dynamic_replicator_reset(drvdata);
+

Based on your comment here[1] and the ongoing conversation, I will
wait for a V2.

Thanks,
Mathieu

[1]. https://lkml.org/lkml/2020/5/11/650


Yes, I will post a v2 once we have consensus regarding which way we need to
add a workaround for such QCOM SoCs.

Thanks,
Sai

--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation



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