> On Fri, May 01, 2020 at 12:06:16AM +0200, Ansuel Smith wrote:
> > From: Sham Muthayyan <smuthayy@xxxxxxxxxxxxxx>
> >
> > Add tx term offset support to pcie qcom driver need in some revision of
> > the ipq806x SoC.
> > Ipq8064 have tx term offset set to 7.
> > Ipq8064-v2 revision and ipq8065 have the tx term offset set to 0.
> >
> > Signed-off-by: Sham Muthayyan <smuthayy@xxxxxxxxxxxxxx>
> > Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx>
> > ---
> > drivers/pci/controller/dwc/pcie-qcom.c | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c
> b/drivers/pci/controller/dwc/pcie-qcom.c
> > index da8058fd1925..372d2c8508b5 100644
> > --- a/drivers/pci/controller/dwc/pcie-qcom.c
> > +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> > @@ -45,6 +45,9 @@
> > #define PCIE_CAP_CPL_TIMEOUT_DISABLE 0x10
> >
> > #define PCIE20_PARF_PHY_CTRL 0x40
> > +#define PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK GENMASK(12,
> 16)
> > +#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) ((x) << 16)
> > +
> > #define PCIE20_PARF_PHY_REFCLK 0x4C
> > #define PHY_REFCLK_SSP_EN BIT(16)
> > #define PHY_REFCLK_USE_PAD BIT(12)
> > @@ -118,6 +121,7 @@ struct qcom_pcie_resources_2_1_0 {
> > u32 tx_swing_full;
> > u32 tx_swing_low;
> > u32 rx0_eq;
> > + u8 phy_tx0_term_offset;
> > };
> >
> > struct qcom_pcie_resources_1_0_0 {
> > @@ -318,6 +322,11 @@ static int
> qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
> > if (IS_ERR(res->ext_reset))
> > return PTR_ERR(res->ext_reset);
> >
> > + if (of_device_is_compatible(dev->of_node, "qcom,pcie-ipq8064"))
> > + res->phy_tx0_term_offset = 7;
>
> Based on my other comments, you'll want to turn this into match data.
>
I don't understand what you mean here. I really can't think of another way
to set this only for qcom,pci-ipq8064 as ipq8064-v2 and apq8064 use the
same get resource function. Should I create a different get_resources for
the other 2 device?
> > + else
> > + res->phy_tx0_term_offset = 0;
> > +
