Quoting Vinod Koul (2020-04-23 21:43:11)
> Add the missing ufs card and ufs phy clocks for SM8150. They were missed
> in earlier addition of clock driver.
>
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> ---
> drivers/clk/qcom/gcc-sm8150.c | 84 +++++++++++++++++++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
> index 5c3dc34c955e..4354620fa12d 100644
> --- a/drivers/clk/qcom/gcc-sm8150.c
> +++ b/drivers/clk/qcom/gcc-sm8150.c
> @@ -2881,6 +2881,45 @@ static struct clk_branch gcc_ufs_card_phy_aux_hw_ctl_clk = {
> },
> };
>
> +/* external clocks so add BRANCH_HALT_SKIP */
> +static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = {
> + .halt_check = BRANCH_HALT_SKIP,
> + .clkr = {
> + .enable_reg = 0x7501c,
> + .enable_mask = BIT(0),
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_ufs_card_rx_symbol_0_clk",
Any reason to not use .fw_name?
> + .ops = &clk_branch2_ops,
> + },
> + },
> +};
> +
> +/* external clocks so add BRANCH_HALT_SKIP */
> +static struct clk_branch gcc_ufs_card_rx_symbol_1_clk = {
> + .halt_check = BRANCH_HALT_SKIP,
> + .clkr = {
> + .enable_reg = 0x750ac,
> + .enable_mask = BIT(0),
