This series adds support for the Synopsis 7nm HSPHY USB driver being used in QCOM chipsets. The HSPHY register map differs compared to other PHY revisions. In addition, modifications and updates are done to the QMP driver to add new registers/offsets, and to update the initialization sequence for enabling the SSUSB path on SM8150. Changes in v6: - Addressed coding style errors in phy-qcom-snps-femto-v2.c Changes in v5: - Reorganize IF check for when to use the proper PWRDOWN CTRL offset - Rename UFS specific offset definitions in the QMP PHY driver to clearly denote they are UFS specific - Rename the phy-qcom-snps-7nm driver to phy-qcom-snps-femto-v2 Changes in v4: - Fix POWERDOWN offset for QMP PHY exit routine, and check for has_phy_dp_com_ctrl instead of !has_phy_com_ctrl Changes in v3: - Use devm_reset_control_get_exclusive instead of referencing index for reset handle Changes in v2: - Fixed YAML errors caught by dt_binding_check Jack Pham (1): phy: qcom-qmp: Add SM8150 QMP USB3 PHY support Wesley Cheng (4): dt-bindings: phy: Add binding for qcom,usb-snps-femto-v2 phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB phy: qcom-qmp: Rename UFS PCS QMP v4 registers .../bindings/phy/qcom,usb-snps-femto-v2.yaml | 77 ++++++ drivers/phy/qualcomm/Kconfig | 10 + drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-qmp.c | 193 +++++++++++++- drivers/phy/qualcomm/phy-qcom-qmp.h | 238 +++++++++++++++-- drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 296 +++++++++++++++++++++ 6 files changed, 779 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml create mode 100644 drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
