On Fri, Mar 13, 2020 at 8:15 PM Ansuel Smith <ansuelsmth@xxxxxxxxx> wrote:
> For IPQ806x targets, TZ protects the registers that are used to
> configure the routing of interrupts to a target processor.
> To resolve this, this patch uses scm call to route GPIO interrupts
> to application processor. Also the scm call interface is changed.
>
> Signed-off-by: Ajay Kishore <akisho@xxxxxxxxxxxxxx>
> Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx>
That's advanced. I'd really like Bjorn's review on this.
> + ret = of_device_is_compatible(pctrl->dev->of_node,
> + "qcom,ipq8064-pinctrl");
> /* Route interrupts to application cpu */
> - val = msm_readl_intr_target(pctrl, g);
> - val &= ~(7 << g->intr_target_bit);
> - val |= g->intr_target_kpss_val << g->intr_target_bit;
> - msm_writel_intr_target(val, pctrl, g);
> + if (!ret) {
Can't you just:
if (!of_device_is_compatible(pctrl->dev->of_node, "qcom,ipq8064-pinctrl")) {
OK maybe nitpicky.
> + val = msm_readl_intr_target(pctrl, g);
> + val &= ~(7 << g->intr_target_bit);
> + val |= g->intr_target_kpss_val << g->intr_target_bit;
> + msm_writel_intr_target(val, pctrl, g);
> + } else {
> + const __be32 *reg = of_get_property(pctrl->dev->of_node,
> + "reg", NULL);
> +
> + if (reg) {
> + u32 addr = be32_to_cpup(reg) + g->intr_target_reg;
> +
> + qcom_scm_io_readl(addr, &val);
> + __iormb();
> +
> + val &= ~(7 << g->intr_target_bit);
> + val |= g->intr_target_kpss_val << g->intr_target_bit;
> +
> + __iowmb();
> + ret = qcom_scm_io_writel(addr, val);
> + if (ret)
> + pr_err("\n Routing interrupts to Apps proc failed");
> + }
Can we at least put a little comment on top here and explain what is
going on?
Yours,
Linus Walleij
