Re: [PATCH v2 1/2] clk: qcom: gcc: Add USB3 PIPE clock and GDSC for SM8150

[Stephen Boyd <sboyd@xxxxxxxxxx>]

Quoting Wesley Cheng (2020-03-17 13:53:31)
> diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h
> index 90d60ef..3e1a918 100644
> --- a/include/dt-bindings/clock/qcom,gcc-sm8150.h
> +++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h
> @@ -240,4 +240,8 @@
>  #define GCC_USB30_SEC_BCR                                      27
>  #define GCC_USB_PHY_CFG_AHB2PHY_BCR                            28
>  
> +/* GCC GDSCRs */
> +#define USB30_PRIM_GDSC                     4
> +#define USB30_SEC_GDSC                                         5

BTW, should we expect more GDSCs at 0,1,2,3 here? Why wasn't that done
initially?