On Fri 06 Mar 09:19 PST 2020, Loic Poulain wrote:
> The msm8916 CCI controller provides one CCI/I2C bus.
>
> Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxx>
> Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>
> ---
> v2: add this patch in the series
> v3: add only cci node for now
> v4: no change
>
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 8686e10..985cb5f 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1451,6 +1451,33 @@
> };
> };
>
> + cci@1b0c000 {
Given that this node is status disabled, we should have a label on it so
that we can enable it.
Apart from that,
Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Regards,
Bjorn
> + compatible = "qcom,msm8916-cci";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x1b0c000 0x1000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>,
> + <&gcc GCC_CAMSS_AHB_CLK>;
> + clock-names = "camss_top_ahb", "cci_ahb",
> + "cci", "camss_ahb";
> + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
> + <&gcc GCC_CAMSS_CCI_CLK>;
> + assigned-clock-rates = <80000000>, <19200000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&cci0_default>;
> + status = "disabled";
> +
> + cci0: i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <400000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> camss: camss@1b00000 {
> compatible = "qcom,msm8916-camss";
> reg = <0x1b0ac00 0x200>,
> --
> 2.7.4
>
