Signed-off-by: Robert Foss <robert.foss@xxxxxxxxxx>
On Wed, 4 Mar 2020 at 17:49, Loic Poulain <loic.poulain@xxxxxxxxxx> wrote:
>
> From: Todor Tomov <todor.tomov@xxxxxxxxxx>
>
> Add DT binding document for Qualcomm Camera Control Interface (CCI)
> I2C controller.
>
> Signed-off-by: Todor Tomov <todor.tomov@xxxxxxxxxx>
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
> ---
> v2: Fix subnode properties, remove mandatory clock names
> v3: Add sdm845 compatible string
>
> .../devicetree/bindings/i2c/i2c-qcom-cci.txt | 92 ++++++++++++++++++++++
> 1 file changed, 92 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
> new file mode 100644
> index 0000000..c6668b7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt
> @@ -0,0 +1,92 @@
> +Qualcomm Camera Control Interface (CCI) I2C controller
> +
> +PROPERTIES:
> +
> +- compatible:
> + Usage: required
> + Value type: <string>
> + Definition: must be one of:
> + "qcom,msm8916-cci"
> + "qcom,msm8996-cci"
> + "qcom,sdm845-cci"
> +
> +- reg
> + Usage: required
> + Value type: <prop-encoded-array>
> + Definition: base address CCI I2C controller and length of memory
> + mapped region.
> +
> +- interrupts:
> + Usage: required
> + Value type: <prop-encoded-array>
> + Definition: specifies the CCI I2C interrupt. The format of the
> + specifier is defined by the binding document describing
> + the node's interrupt parent.
> +
> +- clocks:
> + Usage: required
> + Value type: <prop-encoded-array>
> + Definition: a list of phandle, should contain an entry for each
> + entries in clock-names.
> +
> +- clock-names
> + Usage: required
> + Value type: <string>
> + Definition: a list of clock names, must include "cci" clock.
> +
> +- power-domains
> + Usage: required for "qcom,msm8996-cci"
> + Value type: <prop-encoded-array>
> + Definition:
> +
> +SUBNODES:
> +
> +The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996 and
> +sdm845), described as subdevices named "i2c-bus@0" and "i2c-bus@1".
> +
> +PROPERTIES:
> +
> +- reg:
> + Usage: required
> + Value type: <u32>
> + Definition: Index of the CCI bus/master
> +
> +- clock-frequency:
> + Usage: optional
> + Value type: <u32>
> + Definition: Desired I2C bus clock frequency in Hz, defaults to 100
> + kHz if omitted.
> +
> +Example:
> +
> + cci@a0c000 {
> + compatible = "qcom,msm8996-cci";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0xa0c000 0x1000>;
> + interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
> + <&mmcc CAMSS_TOP_AHB_CLK>,
> + <&mmcc CAMSS_CCI_AHB_CLK>,
> + <&mmcc CAMSS_CCI_CLK>,
> + <&mmcc CAMSS_AHB_CLK>;
> + clock-names = "mmss_mmagic_ahb",
> + "camss_top_ahb",
> + "cci_ahb",
> + "cci",
> + "camss_ahb";
> +
> + i2c-bus@0 {
> + reg = <0>;
> + clock-frequency = <400000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + i2c-bus@1 {
> + reg = <1>;
> + clock-frequency = <400000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> --
> 2.7.4
>
