Add documentations for ipq806x mdio driver. Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx> --- Changes in v7: - Fix dt_binding_check problem .../bindings/net/qcom,ipq8064-mdio.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml new file mode 100644 index 000000000000..3178cbfdc661 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm ipq806x MDIO bus controller + +maintainers: + - Ansuel Smith <ansuelsmth@xxxxxxxxx> + +description: |+ + The ipq806x soc have a MDIO dedicated controller that is + used to comunicate with the gmac phy conntected. + Child nodes of this MDIO bus controller node are standard + Ethernet PHY device nodes as described in + Documentation/devicetree/bindings/net/phy.txt + +allOf: + - $ref: "mdio.yaml#" + +properties: + compatible: + const: qcom,ipq8064-mdio + reg: + maxItems: 1 + description: address and length of the register set for the device + clocks: + maxItems: 1 + description: A reference to the clock supplying the MDIO bus controller + +required: + - compatible + - reg + - clocks + - "#address-cells" + - "#size-cells" + +examples: + - | + mdio0: mdio@37000000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "qcom,ipq8064-mdio", "syscon"; + reg = <0x37000000 0x200000>; + resets = <&gcc GMAC_CORE1_RESET>; + reset-names = "stmmaceth"; + clocks = <&gcc GMAC_CORE1_CLK>; + + switch@10 { + compatible = "qca,qca8337"; + /* ... */ + }; + }; -- 2.25.0
