On Mon, Jan 27, 2020 at 10:43 AM John Crispin <john@xxxxxxxxxxx> wrote: > > On 06/01/2020 16:37, Robert Marko wrote: > > +#define PHY_CTRL0_ADDR 0x000 > > +#define PHY_CTRL1_ADDR 0x004 > > +#define PHY_CTRL2_ADDR 0x008 > > +#define PHY_CTRL3_ADDR 0x00C > > +#define PHY_CTRL4_ADDR 0x010 > > +#define PHY_MISC_ADDR 0x024 > > +#define PHY_IPG_ADDR 0x030 > > + > > +#define PHY_CTRL0_VAL 0xA4600015 > > +#define PHY_CTRL1_VAL 0x09500000 > > +#define PHY_CTRL2_VAL 0x00058180 > > +#define PHY_CTRL3_VAL 0x6DB6DCD6 > > +#define PHY_CTRL4_VAL 0x836DB6DB > > +#define PHY_MISC_VAL 0x3803FB0C > > +#define PHY_IPG_VAL 0x47323232 > > looks like this was some cruft from silicon bringup days, current mass > production silicon has these values as power-on defaults. please resend > with the register writes and defines simply removed. > John Done
