Quoting Bjorn Andersson (2019-12-07 12:36:02) > The CLKREF clocks are all fed by the clock signal on the CXO2 pad on the > SoC. Update the definition of these clocks to allow this to be wired up > to the appropriate clock source. > > Retain "xo" as the global named parent to make the change a nop in the > event that DT doesn't carry the necessary clocks definition. Something seems wrong still. I wonder if we need to add the XO "active only" clk to the rpm clk driver(s) and mark it as CLK_IS_CRITICAL. In theory that is really the truth for most of the SoCs out there because it's the only crystal that needs to be on all the time when the CPU is active. The "normal" XO clk will then be on all the time unless deep idle is entered and nobody has turned that on via some clk_prepare() call. That's because we root all other clks through the "normal" XO clk that will be on in deep idle/suspend if someone needs it to be. Did the downstream code explicitly enable this ln_bb_clk in the phy drivers? I think it may have?
