On Tue 19 Nov 03:46 PST 2019, Marc Gonzalez wrote: > On 19/11/2019 11:58, Russell King - ARM Linux admin wrote: > > > On Tue, Nov 19, 2019 at 11:46:21AM +0100, Marc Gonzalez wrote: > > > >> On 19/11/2019 10:57, Russell King - ARM Linux admin wrote: > >> > >>> On Tue, Nov 19, 2019 at 10:28:15AM +0100, Marc Gonzalez wrote: > >>> > >>>> The board I'm working on provides a TCA9539 I/O expander. > >>>> Or, as the datasheet(*) calls it, a "Low Voltage 16-Bit I2C and > >>>> SMBus Low-Power I/O Expander with Interrupt Output, Reset Pin, > >>>> and Configuration Registers" > >>>> > >>>> (*) http://www.ti.com/lit/ds/symlink/tca9539.pdf > >>>> > >>>> The binding is documented in Documentation/devicetree/bindings/gpio/gpio-pca953x.txt > >>>> > >>>> I have some doubts about the interrupt output, described as: > >>>> > >>>> Optional properties: > >>>> - interrupts: interrupt specifier for the device's interrupt output. > >>>> > >>>> In my board's DT, the I/O expander is described as: > >>>> > >>>> exp1: gpio@74 { > >>>> compatible = "ti,tca9539"; > >>>> reg = <0x74>; > >>>> gpio-controller; > >>>> #gpio-cells = <2>; > >>>> reset-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; > >>>> pinctrl-names = "default"; > >>>> pinctrl-0 = <&top_exp_rst>; > >>>> interrupt-parent = <&tlmm>; > >>>> interrupts = <42 IRQ_TYPE_LEVEL_HIGH>; > >> > >> As pointed out by ukleinek on IRC, I might have (??) specified the wrong > >> trigger type. The data-sheet states: > >> "The TCA9539 open-drain interrupt (INTn) output is activated when any input state > >> differs from its corresponding Input Port register state, and is used to indicate > >> to the system master that an input state has changed." > >> (The data sheet speaks of "INT with a line on top"; what is the typical way to > >> write that in ASCII? I was told that adding a trailing 'n' or 'b' was common.) > > > > /INT or nINT are commonly used - I've never heard or seen 'b' (which is > > commonly used as a suffix on binary numbers) or a trailing 'n'. > > Perhaps the 'b' suffix is only used in French... > 'b' might stand for "barre" (i.e. the line above the symbol). > > > > Is pin 42 something that can be muxed? If so, it seems sane to specify > > configuration for it. Whether it needs to be a GPIO or whether it has > > a specific "interrupt" function mux state depends on the SoC. > > According to drivers/pinctrl/qcom/pinctrl-msm8998.c > PINGROUP(42, EAST, blsp_spi6, blsp_uart3_b, blsp_uim3_b, _, qdss, _, _, _, _) > > I don't think there is an explicit "interrupt" function in > this pinctrl driver... except FUNCTION(ssc_irq). > No there's no "interrupt" function, the function to be used is "gpio", which will ensure that the irq logic is available. But in a modern kernel we're implicitly selecting the "gpio" function if you're requesting an interrupt. So you shouldn't need to specify this even. > static const char * const ssc_irq_groups[] = { > "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", "gpio78", > "gpio79", "gpio80", "gpio117", "gpio118", "gpio119", "gpio120", > "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", > }; > > @Bjorn, do you know what these are used for? > The "ssc" would imply that it relates to the secure coprocessor somehow. Regards, Bjorn
