On 24.10.19 г. 10:07 ч., Brian Masney wrote: > On Wed, Oct 23, 2019 at 04:39:21PM +0300, Georgi Djakov wrote: >> On 23.10.19 г. 15:47 ч., Brian Masney wrote: >>> On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote: >>>> On 13.10.19 г. 11:08 ч., Brian Masney wrote: >>>>> Add interconnect nodes that's needed to support bus scaling. >>>>> >>>>> Signed-off-by: Brian Masney <masneyb@xxxxxxxxxxxxx> >>>>> --- >>>>> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++ >>>>> 1 file changed, 60 insertions(+) >>>>> >>>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi >>>>> @@ -1152,6 +1207,11 @@ >>>>> "core", >>>>> "vsync"; >>>>> >>>>> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>, >>>>> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>; >>>> >>>> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU >>>> or both? The above seem like GPU-related interconnects, so maybe these >>>> properties should be in the GPU DT node. >>> >>> The display is what currently requests the interconnect path, >>> specifically mdp5_setup_interconnect() in >>> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings >>> currently don't have interconnect support. Maybe this is something that >>> I should add to that driver as well? >> >> The "mdp0-mem" and "mdp1-mem" paths mentioned in the mdp5_kms.c are the two >> interconnects between the display and DDR memory. > > OK, I see. Most of the interconnect paths in the downstream MSM 3.4 > sources are configured in device tree using the > qcom,msm-bus,vectors-KBps property, which is what I was only looking at > before. The interconnect path for the display is configured directly in > code (drivers/video/msm/mdss/mdss_mdp.c) to setup a path between > MSM_BUS_MASTER_MDP_PORT0 and MSM_BUS_SLAVE_EBI_CH0. Correct! > > In the upstream kernel, it looks like I'll need to > > 1) add support for an optional second interconnect path for ocmem to > drivers/gpu/drm/msm/adreno/adreno_gpu.c. Yes, just check if there is a "gpu-ocmem" path in DT and scale it when needed. > > 2) add implementations of gpu_get_freq and gpu_get_freq to the > adreno_gpu_funcs struct in drivers/gpu/drm/msm/adreno/a3xx_gpu.c. > Maybe, i am not very familiar with adreno stuff. It might be good to CC the freedreno guys. Thanks, Georgi
