Quoting Lina Iyer (2019-09-11 09:15:57) > On Thu, Sep 05 2019 at 18:39 -0600, Stephen Boyd wrote: > >Quoting Lina Iyer (2019-08-29 11:11:51) > >> When an interrupt is to be serviced, the convention is to mask the > >> interrupt at the chip and unmask after servicing the interrupt. Enabling > >> and disabling the interrupt at the PDC irqchip causes an interrupt storm > >> due to the way dual edge interrupts are handled in hardware. > >> > >> Skip configuring the PDC when the IRQ is masked and unmasked, instead > >> use the irq_enable/irq_disable callbacks to toggle the IRQ_ENABLE > >> register at the PDC. The PDC's IRQ_ENABLE register is only used during > >> the monitoring mode when the system is asleep and is not needed for > >> active mode detection. > > > >I think this is saying that we want to always let the line be sent > >through the PDC to the parent irqchip, in this case GIC, so that we > >don't get an interrupt storm for dual edge interrupts? Why does dual > >edge interrupts cause a problem? > > > I am not sure about the hardware details, but the PDC designers did not > expect enable and disable to be called whenever the interrupt is > handled. This specially becomes a problem for dual edge interrupts which > seems to generate a interrupt storm when enabled/disabled while handling > the interrupt. > Ok. I just wanted to confirm that masking "doesn't matter" to the PDC because it assumes the irqchip closer to the CPU will be able to mask it anyway. Is that right?
