Hi Andrzej and Brian On 16/9/19 12:02, Andrzej Hajda wrote: > On 15.08.2019 02:48, Brian Masney wrote: >> When attempting to configure this driver on a Nexus 5 phone (msm8974), >> setting up the dummy i2c bus for TX_P0 would fail due to an -EBUSY >> error. The downstream MSM kernel sources [1] shows that the proper value >> for TX_P0 is 0x78, not 0x70, so correct the value to allow device >> probing to succeed. >> >> [1] https://github.com/AICP/kernel_lge_hammerhead/blob/n7.1/drivers/video/slimport/slimport_tx_reg.h >> >> Signed-off-by: Brian Masney <masneyb@xxxxxxxxxxxxx> >> --- >> drivers/gpu/drm/bridge/analogix-anx78xx.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/bridge/analogix-anx78xx.h b/drivers/gpu/drm/bridge/analogix-anx78xx.h >> index 25e063bcecbc..bc511fc605c9 100644 >> --- a/drivers/gpu/drm/bridge/analogix-anx78xx.h >> +++ b/drivers/gpu/drm/bridge/analogix-anx78xx.h >> @@ -6,7 +6,7 @@ >> #ifndef __ANX78xx_H >> #define __ANX78xx_H >> >> -#define TX_P0 0x70 >> +#define TX_P0 0x78 > > > This bothers me little. There are no upstream users, grepping android > sources suggests that both values can be used [1][2] (grep for "#define > TX_P0"), moreover there is code suggesting both values can be valid [3]. > > Could you verify datasheet which i2c slave addresses are valid for this > chip, if both I guess this patch should be reworked. > On my case the valid i2c slave address is 0x70 (from datasheet, very sorry I can't share it) and the bridge used is an ANX7814, it could be that ANX7808 or ANX7812 have different slave addresses? Regards, Enric > > [1]: > https://android.googlesource.com/kernel/msm/+/android-msm-flo-3.4-jb-mr2/drivers/misc/slimport_anx7808/slimport_tx_reg.h > > [2]: > https://github.com/AndroidGX/SimpleGX-MM-6.0_H815_20d/blob/master/drivers/video/slimport/anx7812/slimport7812_tx_reg.h > > [3]: > https://github.com/commaai/android_kernel_leeco_msm8996/blob/master/drivers/video/msm/mdss/dp/slimport_custom_declare.h#L73 > > > Regards > > Andrzej > > >> #define TX_P1 0x7a >> #define TX_P2 0x72 >> > >
