On Thu 29 Aug 23:02 PDT 2019, Stephen Boyd wrote:
> The UFS_RESET pin is the magical pin #150 now, not 153 per the
> sdm845_groups array declared in this file. Fix the order of pins so that
> UFS_RESET is 150 and the SDC pins follow after.
>
Woops, thanks
Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> Fixes: 53a5372ce326 ("pinctrl: qcom: sdm845: Expose ufs_reset as gpio")
> Signed-off-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
> ---
> drivers/pinctrl/qcom/pinctrl-sdm845.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c
> index 39f498c09906..ce495970459d 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sdm845.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c
> @@ -262,10 +262,10 @@ static const struct pinctrl_pin_desc sdm845_pins[] = {
> PINCTRL_PIN(147, "GPIO_147"),
> PINCTRL_PIN(148, "GPIO_148"),
> PINCTRL_PIN(149, "GPIO_149"),
> - PINCTRL_PIN(150, "SDC2_CLK"),
> - PINCTRL_PIN(151, "SDC2_CMD"),
> - PINCTRL_PIN(152, "SDC2_DATA"),
> - PINCTRL_PIN(153, "UFS_RESET"),
> + PINCTRL_PIN(150, "UFS_RESET"),
> + PINCTRL_PIN(151, "SDC2_CLK"),
> + PINCTRL_PIN(152, "SDC2_CMD"),
> + PINCTRL_PIN(153, "SDC2_DATA"),
> };
>
> #define DECLARE_MSM_GPIO_PINS(pin) \
> --
> Sent by a computer through tubes
>
