Quoting Amit Kucheria (2019-08-16 15:02:08)
>
> Depending on the version of the tsens IP, there can be 1 (upper/lower
> threshold), 2 (upper/lower + critical threshold) or 3 (upper/lower +
> critical + zero degree) interrupts. This patch series only introduces
> support for a single interrupt (upper/lower).
>
> I used the names tsens0, tsens1 to encapsulate the controller instance
> since some SoCs have 1 controller, others have two. So we'll end up
> with something like the following in DT:
>
> tsens0: thermal-sensor@c263000 {
> compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
> reg = <0 0x0c263000 0 0x1ff>, /* TM */
> <0 0x0c222000 0 0x1ff>; /* SROT */
> #qcom,sensors = <13>;
> interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "tsens0", "tsens0-critical";
> #thermal-sensor-cells = <1>;
> };
>
> tsens1: thermal-sensor@c265000 {
> compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
> reg = <0 0x0c265000 0 0x1ff>, /* TM */
> <0 0x0c223000 0 0x1ff>; /* SROT */
> #qcom,sensors = <8>;
> interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "tsens1", "tsens1-critical";
> #thermal-sensor-cells = <1>;
> }
>
> Does that work?
>
Can you convert this binding to YAML? Then it looks like we can enforce
the number of interrupts based on the compatible string.
