Quoting Vinod Koul (2019-08-14 05:50:07)
> Add apss_shared and apps_rsc node including the rpmhcc child node
>
> Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx>
> ---
Can't this be squashed with the original dtsi file?
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 30 ++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 5c6b103b042b..5258b79676f6 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -4,6 +4,7 @@
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-sm8150.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
But not the rpmh clk bindings?
> @@ -272,6 +279,29 @@
> };
> };
>
> + apps_rsc: rsc@18200000 {
> + label = "apps_rsc";
> + compatible = "qcom,rpmh-rsc";
> + reg = <0x18200000 0x10000>,
> + <0x18210000 0x10000>,
> + <0x18220000 0x10000>;
> + reg-names = "drv-0", "drv-1", "drv-2";
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + qcom,tcs-offset = <0xd00>;
> + qcom,drv-id = <2>;
> + qcom,tcs-config = <ACTIVE_TCS 2>,
> + <SLEEP_TCS 1>,
> + <WAKE_TCS 1>,
> + <CONTROL_TCS 0>;
> +
> + rpmhcc: clock-controller {
> + compatible = "qcom,sm8150-rpmh-clk";
> + #clock-cells = <1>;
Should take some sort of clocks property to get the board clock for XO?
> + };
> + };
> +
