On Wed, Jul 10, 2019 at 12:08:34PM -0600, Jeffrey Hugo wrote: > On Fri, Jul 5, 2019 at 7:06 PM Mark Brown <broonie@xxxxxxxxxx> wrote: > The addresses for these spec defined messages are 8-bit wide, so 256 > valid "destinations". However, the payload is variable. Most of the > defined operations take an 8-bit payload, but there are a few that I > see with 16-bit payloads. Oh, good, variable register sizes, what a market leading idea :( That basically doesn't work with regmap, you need to either define one regmap per register size and attach them to the device or use reg_read() and reg_write() and hide the complexity in there. > As the contents of the generic read/write messages are implementation > defined, the answer to your question seems to be no - the spec does > not define that the registers are 8-bit addressable, and 8-bit wide. The code definitely ought to at least be more flexible then. Right now it's very hard coded. > I think perhaps the discussion needs to step back a bit, and decide > how flexible do we want this regmap over DSI to be? I think its > usefulness comes from when a device can be configured via multiple > interfaces, so I don't expect it to be useful for every DSI interface. > It seems like the DSI panels use DSI directly to craft their > configuration. As a result, we are probably looking at just devices > which use the generic read/write commands, but sadly the format for > those is not universal per the spec. From the implementations I've > seen, I suspect 8-bit addressing of 8-bit wide registers to be the > most common, but apparently there is an exception to that already in > the one device that I care about. It's relatively easy to add a bunch of special cases in - look at how the I2C code handles it, keying off a combination of the register configuration and the capabilities of the host controller. I guess for this it'd mainly be the register configuration. You might find the reg_read()/reg_write() interface better than the raw buffer one for some of the formats, it does let > Do we want to go forward with this regmap support just for the one TI > device, and see what other usecases come out of it, and attempt to > solve those as we go? I have no strong opinions here, it looks fine from a framework point of view though it's unclear to me if viewing it as a register map meshes well with how the hardware is designed or not - it seems plausible though.
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