Re: [PATCH] arm64: dts: qcom: qcs404: Add missing space for cooling-cells property

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On Thu, Jun 27, 2019 at 7:32 PM Niklas Cassel <niklas.cassel@xxxxxxxxxx> wrote:
>
> There should be a space both before and after the equal sign.
> Add a missing space for the cooling cells property.
>
> Fixes: f48cee3239a1 ("arm64: dts: qcom: qcs404: Add thermal zones for each sensor")
> Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxxxx>

Acked-by: Amit Kucheria <amit.kucheria@xxxxxxxxxx>

> ---
>  arch/arm64/boot/dts/qcom/qcs404.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> index 01a51f381850..3d0789775009 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> @@ -35,7 +35,7 @@
>                         enable-method = "psci";
>                         cpu-idle-states = <&CPU_SLEEP_0>;
>                         next-level-cache = <&L2_0>;
> -                       #cooling-cells= <2>;
> +                       #cooling-cells = <2>;
>                 };
>
>                 CPU1: cpu@101 {
> @@ -45,7 +45,7 @@
>                         enable-method = "psci";
>                         cpu-idle-states = <&CPU_SLEEP_0>;
>                         next-level-cache = <&L2_0>;
> -                       #cooling-cells= <2>;
> +                       #cooling-cells = <2>;
>                 };
>
>                 CPU2: cpu@102 {
> @@ -55,7 +55,7 @@
>                         enable-method = "psci";
>                         cpu-idle-states = <&CPU_SLEEP_0>;
>                         next-level-cache = <&L2_0>;
> -                       #cooling-cells= <2>;
> +                       #cooling-cells = <2>;
>                 };
>
>                 CPU3: cpu@103 {
> @@ -65,7 +65,7 @@
>                         enable-method = "psci";
>                         cpu-idle-states = <&CPU_SLEEP_0>;
>                         next-level-cache = <&L2_0>;
> -                       #cooling-cells= <2>;
> +                       #cooling-cells = <2>;
>                 };
>
>                 L2_0: l2-cache {
> --
> 2.21.0
>



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