Support dynamic voltage and frequency scaling on qcs404.
Co-developed-by: Niklas Cassel <niklas.cassel@xxxxxxxxxx>
Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxxxx>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 9569686dbc41..4b4ce0b5df76 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -34,6 +34,9 @@
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
CPU1: cpu@101 {
@@ -43,6 +46,9 @@
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
CPU2: cpu@102 {
@@ -52,6 +58,9 @@
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
CPU3: cpu@103 {
@@ -61,6 +70,9 @@
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
L2_0: l2-cache {
--
2.21.0
