On Tue, Jun 18, 2019 at 4:10 PM Rob Clark <robdclark@xxxxxxxxx> wrote: > > From: Georgi Djakov <georgi.djakov@xxxxxxxxxx> > > The interconnect API provides an interface for consumer drivers to > express their bandwidth needs in the SoC. This data is aggregated > and the on-chip interconnect hardware is configured to the most > appropriate power/performance profile. > > Use the API to configure the interconnects and request bandwidth > between DDR and the display hardware (MDP port(s) and rotator > downscaler). > > v2: update the path names to be consistent with dpu, handle the NULL > path case, updated commit msg from Georgi. > v3: split out icc setup into it's own function, and rework logic > slightly so no interconnect paths is not fatal. > > Signed-off-by: Georgi Djakov <georgi.djakov@xxxxxxxxxx> > Signed-off-by: Rob Clark <robdclark@xxxxxxxxxxxx> Looks good to me. Reviewed-By: Jeffrey Hugo <jeffrey.l.hugo@xxxxxxxxx>
