On Thu 23 May 12:44 PDT 2019, Niklas Cassel wrote: > Currently, there is only a 1 ms sleep after asserting PERST. > > Reading the datasheets for different endpoints, some require PERST to be > asserted for 10 ms in order for the endpoint to perform a reset, others > require it to be asserted for 50 ms. > > Several SoCs using this driver uses PCIe Mini Card, where we don't know > what endpoint will be plugged in. > > The PCI Express Card Electromechanical Specification specifies: > "On power up, the deassertion of PERST# is delayed 100 ms (TPVPERL) from > the power rails achieving specified operating limits." > > Add a sleep of 100 ms before deasserting PERST, in order to ensure that > we are compliant with the spec. > > Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxxxx> Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 0ed235d560e3..cae24376237c 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1110,6 +1110,8 @@ static int qcom_pcie_host_init(struct pcie_port *pp) > if (IS_ENABLED(CONFIG_PCI_MSI)) > dw_pcie_msi_init(pp); > > + /* Ensure that PERST has been asserted for at least 100 ms */ > + msleep(100); > qcom_ep_reset_deassert(pcie); > > ret = qcom_pcie_establish_link(pcie); > -- > 2.21.0 >
