On 18-02-19, 22:04, Bjorn Andersson wrote:
> +static int qcom_pcie2_phy_power_on(struct phy *phy)
> +{
> + struct qcom_phy *qphy = phy_get_drvdata(phy);
> + int ret;
> + u32 val;
> +
> + /* Program REF_CLK source */
> + val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
> + val &= ~BIT(1);
> + writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
> +
> + usleep_range(1000, 2000);
> +
> + /* Don't use PAD for refclock */
> + val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
> + val &= ~BIT(0);
> + writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL2);
> +
> + /* Program SSP ENABLE */
> + val = readl(qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL3);
> + val |= BIT(0);
> + writel(val, qphy->base + PCIE20_PARF_PHY_REFCLK_CTRL3);
we have this readl, modify and writel pattern in the file. I guess it
makes sense to add a modifyl() with mask and value as args..
--
~Vinod
