Re: WIP: PCIe on MSM8998

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On 21/03/2019 00:07, Robin Murphy wrote:

> Unfortunately, having looked around the code, I think I do. 4.4 long 
> predates the iommu-map binding, and in the absence of anything other 
> than the hard-coded SID==RID assumption of arm-smmu at the time, they 
> apparently went and did their own wacky thing[1]. AFAICS the Stream ID 
> appears to be pretty much derived from the PCI topology as I would hope, 
> but it looks like it might depend on some sort of lookup table being 
> programmed appropriately as well.
> 
> Bear in mind that the this is _The Qualcomm Android Kernel_ we're trying 
> to reason about here - playing true to the stereotype, the diff against 
> the mainline driver is significantly bigger than the entire mainline 
> driver itself; the line count of arm-smmu.c alone is pushing 
> 2-and-a-half times that of the file in 4.4.y ;)
> 
> Since the curiosity had set in, I finally got round to dumping the ACPI 
> tables from my Snapdragon 835 laptop, and judging by the IORT it seems 
> like the EFI firmware for Windows machines does provide some set of 
> static ID mappings which could probably transcribe to an iommu-map (if 
> indeed it's valid at all - Windows itself doesn't seem to be even 
> touching PCI here), but I guess the Android BSP might not be so 
> generous. That'll be a question for the Qualcomm folks. FWIW mine 
> interestingly claims that its SMMU instances are all sharing SPI 231 as 
> a global fault interrupt, but whether that's true and/or depends on the 
> runtime firmware, again I really have no idea.
> 
> Robin.
> 
> [1] 
> https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/drivers/pci/host/pci-msm.c?h=LE.UM.1.3.r3.25&id=f1fa301f977f06dcf990c0452d85e2f67d8cbbf1#n4687

There are indeed two MMIO writes from msm_pcie_configure_sid()

	msm_pcie_write_reg(pcie_dev->parf, PCIE20_PARF_BDF_TRANSLATE_N + pcie_dev->current_short_bdf * 4, bdf >> 16);

msm_pcie_configure_sid: PCIe: RC0: device address is: ffffffc0f8933898
msm_pcie_configure_sid: PCIe: RC0: PCI device address is: ffffffc0f8933800
[    01c00000 + 000254] = 00000000
msm_pcie_configure_sid: PCIe: RC0: Device: 00:00.0 received SID 5249

msm_pcie_configure_sid: PCIe: RC0: device address is: ffffffc0f8934898
msm_pcie_configure_sid: PCIe: RC0: PCI device address is: ffffffc0f8934800
[    01c00000 + 000258] = 00000100
msm_pcie_configure_sid: PCIe: RC0: Device: 01:00.0 received SID 5250

I can confirm that mainline does not hit anywhere near 0x1c00000 + 0x250

Call stack:

msm_pcie_configure_sid | arm_smmu_init_pci_device | arm_smmu_device_group | iommu_group_get_for_dev | arm_smmu_add_device | iommu_bus_notifier | notifier_call_chain | __blocking_notifier_call_chain | blocking_notifier_call_chain | device_add | pci_device_add | pci_scan_single_device | pci_scan_slot | 

I'll try to hack something together in mainline...

Regards.



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