This is the latest incarnation of per-instance pagetable support for the MSM GPU driver. Some of these have been seen before, most recently [1]. Per-instance pagetables allow the target GPU driver to create and manage an individual pagetable for each file descriptor instance and switch between them asynchronously using the GPU to reprogram the pagetable registers on the fly. This is accomplished in this series by taking advantage of the multiple IOMMU domain API from Lu Baolu [2] and all these patches are based on that patch. This series is split into three parts: Part one adds support for split pagetables. These are the same patches from the previous attempts [1]. Split pagetables allow the hardware to switch out the lower pagetable (TTBR0) without affecting the global allocations in the upper one (TTBR1). Part 2 adds aux domain support for arm-smmu-v2. New aux domains create a new pagetable but do not touch the underlying hardware. The target driver uses the new aux domain to map and unmap memory through the usual mechanisms. The final part is the support in the GPU driver to enable 64 bit addressing for a5xx and a6xx, set up the support for split pagetables, create new per-instance pagetables for a new instance and submit the GPU command to switch the pagetable at the appropriate time. This is compile tested but I haven't done much target testing as of yet. I wanted to get this out in the world for debate while we work on fixing up the minor issues. In particular, I want to make sure that this fits with the current thinking about how aux domains should look and feel. [1] https://patchwork.freedesktop.org/series/43447/ [2] https://patchwork.kernel.org/patch/10825061/ Jordan Crouse (15): iommu: Add DOMAIN_ATTR_SPLIT_TABLES iommu/arm-smmu: Add split pagetable support for arm-smmu-v2 iommu/io-pgtable: Allow TLB operations to be optional iommu: Add DOMAIN_ATTR_PTBASE iommu/arm-smmu: Add auxiliary domain support for arm-smmuv2 drm/msm/adreno: Enable 64 bit mode by default on a5xx and a6xx targets drm/msm: Print all 64 bits of the faulting IOMMU address drm/msm: Pass the MMU domain index in struct msm_file_private drm/msm/gpu: Move address space setup to the GPU targets drm/msm: Add support for IOMMU auxiliary domains drm/msm: Add a helper function for a per-instance address space drm/msm: Add support to create target specific address spaces drm/msm/gpu: Add ttbr0 to the memptrs drm/msm/a6xx: Support per-instance pagetables drm/msm/a5xx: Support per-instance pagetables drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 37 ++-- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 50 ++++-- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 51 ++++-- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 163 +++++++++++++++++- drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 19 ++ drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 70 ++++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 167 +++++++++++++++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 7 - drivers/gpu/drm/msm/msm_drv.c | 25 ++- drivers/gpu/drm/msm/msm_drv.h | 5 + drivers/gpu/drm/msm/msm_gem.h | 2 + drivers/gpu/drm/msm/msm_gem_submit.c | 13 +- drivers/gpu/drm/msm/msm_gem_vma.c | 53 +++--- drivers/gpu/drm/msm/msm_gpu.c | 59 +------ drivers/gpu/drm/msm/msm_gpu.h | 3 + drivers/gpu/drm/msm/msm_iommu.c | 99 ++++++++++- drivers/gpu/drm/msm/msm_mmu.h | 4 + drivers/gpu/drm/msm/msm_ringbuffer.h | 1 + drivers/iommu/arm-smmu-regs.h | 18 ++ drivers/iommu/arm-smmu.c | 278 ++++++++++++++++++++++++++---- drivers/iommu/io-pgtable-arm.c | 3 +- drivers/iommu/io-pgtable.h | 10 +- include/linux/iommu.h | 2 + 24 files changed, 952 insertions(+), 188 deletions(-) -- 2.7.4
