Quoting Vinod Koul (2019-02-10 23:39:28) > From: Taniya Das <tdas@xxxxxxxxxxxxxx> > > The CFG/M/N/D registers are at an offset of 0x20 from the CMD register > only for blsp1_uart3 clock, so add it for uart3 only. > > Signed-off-by: Taniya Das <tdas@xxxxxxxxxxxxxx> > Signed-off-by: Anu Ramanathan <anur@xxxxxxxxxxxxxx> > Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx> > Signed-off-by: Vinod Koul <vkoul@xxxxxxxxxx> > --- Applied to clk-next
