Re: [PATCH 2/2] clk: qcom: gcc-qcs404: Add cfg_offset for blsp1_uart3 clock

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Quoting Vinod Koul (2019-01-28 03:53:59)
> diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
> index 64da032bb9ed..493e055299b4 100644
> --- a/drivers/clk/qcom/gcc-qcs404.c
> +++ b/drivers/clk/qcom/gcc-qcs404.c
> @@ -678,6 +678,7 @@ static struct clk_rcg2 blsp1_uart3_apps_clk_src = {
>         .cmd_rcgr = 0x4014,
>         .mnd_width = 16,
>         .hid_width = 5,
> +       .cfg_off = 0x20,

And it's one single clk! None of the other blsp clks have this problem?

>         .parent_map = gcc_parent_map_0,
>         .freq_tbl = ftbl_blsp1_uart0_apps_clk_src,
>         .clkr.hw.init = &(struct clk_init_data){




[Index of Archives]     [Linux ARM Kernel]     [Linux ARM]     [Linux Omap]     [Fedora ARM]     [Linux for Sparc]     [IETF Annouce]     [Security]     [Bugtraq]     [Linux MIPS]     [ECOS]     [Asterisk Internet PBX]     [Linux API]

  Powered by Linux