Support CPU frequency scaling on qcs404.
Co-developed-by: Niklas Cassel <niklas.cassel@xxxxxxxxxx>
Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxxxx>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 948ba3c..a0f58bf 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -30,6 +30,8 @@
reg = <0x100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
};
CPU1: cpu@101 {
@@ -38,6 +40,8 @@
reg = <0x101>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
};
CPU2: cpu@102 {
@@ -46,6 +50,8 @@
reg = <0x102>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
};
CPU3: cpu@103 {
@@ -54,6 +60,8 @@
reg = <0x103>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
};
L2_0: l2-cache {
--
2.7.4
