On Thu, Jan 17, 2019 at 02:57:18PM +0530, Vivek Gautam wrote: > Adding a device tree option for arm smmu to enable non-cacheable > memory for page tables. > We already enable a smmu feature for coherent walk based on > whether the smmu device is dma-coherent or not. Have an option > to enable non-cacheable page table memory to force set it for > particular smmu devices. Hmm, I must be missing something here. What is the difference between this new property, and simply omitting dma-coherent on the SMMU? Will
