Quoting Jeffrey Hugo (2018-12-03 08:13:43) > The offsets for the defined BCR reset registers does not match the hardware > documentation. Update the values to match the hardware documentation. > > Fixes: b5f5f525c547 (clk: qcom: Add MSM8998 Global Clock Control (GCC) driver) > Signed-off-by: Jeffrey Hugo <jhugo@xxxxxxxxxxxxxx> > Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> > --- Applied to clk-next