On Sun, Nov 11, 2018 at 10:53 PM Veerabhadrarao Badiganti <vbadigan@xxxxxxxxxxxxxx> wrote: > > On few SDHCI-MSM controllers, the host controller's clock tuning > circuit may go out of sync if controller clocks are gated which > eventually will result in data CRC, command CRC/timeout errors. > To overcome this h/w limitation, the DLL needs to be re-initialized > and restored with its old settings once clocks are ungated. > > Signed-off-by: Veerabhadrarao Badiganti <vbadigan@xxxxxxxxxxxxxx> Reviewed-by: Evan Green <evgreen@xxxxxxxxxxxx>
