[PATCH] arm: Fix typo

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Hello,

This is a big typo correction for arm. The patch applies to linux-4.19-rc8. 
Can someone check it and push it upstream? Thank you.

Signed-off-by: Loic <hackurx@xxxxxxxxxx>

diff -Nurp a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
--- a/arch/arm/boot/compressed/head.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/compressed/head.S	2018-10-21 14:13:55.774666867 +0200
@@ -857,7 +857,7 @@ call_cache_fn:	adr	r12, proc_types
 		/*
 		 * On v7-M the processor id is located in the V7M_SCB_CPUID
 		 * register, but as cache handling is IMPLEMENTATION DEFINED on
-		 * v7-M (if existant at all) we just return early here.
+		 * v7-M (if existent at all) we just return early here.
 		 * If V7M_SCB_CPUID were used the cpu ID functions (i.e.
 		 * __armv7_mmu_cache_{on,off,flush}) would be selected which
 		 * use cp15 registers that are not implemented on v7-M.
diff -Nurp a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
--- a/arch/arm/boot/dts/exynos3250.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/exynos3250.dtsi	2018-10-21 14:13:55.782666889 +0200
@@ -6,7 +6,7 @@
  *		http://www.samsung.com
  *
  * Samsung's Exynos3250 SoC device nodes are listed in this file. Exynos3250
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
--- a/arch/arm/boot/dts/exynos4210.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/exynos4210.dtsi	2018-10-21 14:13:55.782666889 +0200
@@ -8,7 +8,7 @@
  *		www.linaro.org
  *
  * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
--- a/arch/arm/boot/dts/exynos4412.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/exynos4412.dtsi	2018-10-21 14:13:55.782666889 +0200
@@ -6,7 +6,7 @@
  *		http://www.samsung.com
  *
  * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
--- a/arch/arm/boot/dts/exynos4.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/exynos4.dtsi	2018-10-21 14:13:55.774666867 +0200
@@ -9,7 +9,7 @@
  *
  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  * SoCs from Exynos4 series can include this file and provide values for SoCs
- * specfic bindings.
+ * specific bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
diff -Nurp a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
--- a/arch/arm/boot/dts/exynos5250.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/exynos5250.dtsi	2018-10-21 14:13:55.786666899 +0200
@@ -7,7 +7,7 @@
  *
  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
  * EXYNOS5250 based board files can include this file and provide
- * values for board specfic bindings.
+ * values for board specific bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
diff -Nurp a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
--- a/arch/arm/boot/dts/integratorap.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/integratorap.dts	2018-10-21 14:13:55.790666910 +0200
@@ -20,7 +20,7 @@
 			/*
 			 * Since the board has pluggable CPU modules, we
 			 * cannot define a proper compatible here. Let the
-			 * boot loader fill in the apropriate compatible
+			 * boot loader fill in the appropriate compatible
 			 * string if necessary.
 			 */
 			/* compatible = "arm,arm926ej-s"; */
diff -Nurp a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
--- a/arch/arm/boot/dts/integratorcp.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/integratorcp.dts	2018-10-21 14:13:55.794666921 +0200
@@ -23,7 +23,7 @@
 			/*
 			 * Since the board has pluggable CPU modules, we
 			 * cannot define a proper compatible here. Let the
-			 * boot loader fill in the apropriate compatible
+			 * boot loader fill in the appropriate compatible
 			 * string if necessary.
 			 */
 			/* compatible = "arm,arm920t"; */
diff -Nurp a/arch/arm/boot/dts/kirkwood-rd88f6192.dts b/arch/arm/boot/dts/kirkwood-rd88f6192.dts
--- a/arch/arm/boot/dts/kirkwood-rd88f6192.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/kirkwood-rd88f6192.dts	2018-10-21 14:13:55.794666921 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6192 Board descrition
+ * Marvell RD88F6192 Board description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts b/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts
--- a/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281-a.dts	2018-10-21 14:13:55.798666931 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6181 A Board descrition
+ * Marvell RD88F6181 A Board description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
--- a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi	2018-10-21 14:13:55.798666931 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6181 Common Board descrition
+ * Marvell RD88F6181 Common Board description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts b/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts
--- a/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts	2018-10-21 14:13:55.798666931 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6181 Z0 stepping descrition
+ * Marvell RD88F6181 Z0 stepping description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts
--- a/arch/arm/boot/dts/mmp2-brownstone.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/mmp2-brownstone.dts	2018-10-21 14:13:55.802666942 +0200
@@ -30,7 +30,7 @@
 			twsi1: i2c@d4011000 {
 				status = "okay";
 				pmic: max8925@3c {
-					compatible = "maxium,max8925";
+					compatible = "maximum,max8925";
 					reg = <0x3c>;
 					interrupts = <1>;
 					interrupt-parent = <&intcmux4>;
diff -Nurp a/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi b/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi
--- a/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/omap3-panel-sharp-ls037v7dw01.dtsi	2018-10-21 14:13:55.802666942 +0200
@@ -2,7 +2,7 @@
 /*
  * Common file for omap dpi panels with QVGA and reset pins
  *
- * Note that the board specifc DTS file needs to specify
+ * Note that the board specific DTS file needs to specify
  * at minimum the GPIO enable-gpios for display, and
  * gpios for gpio-backlight.
  */
diff -Nurp a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi	2018-10-21 14:13:55.802666942 +0200
@@ -2,7 +2,7 @@
 /*
  * Common file for GPMC connected smsc911x on omaps
  *
- * Note that the board specifc DTS file needs to specify
+ * Note that the board specific DTS file needs to specify
  * ranges, pinctrl, reg, interrupt parent and interrupts.
  */
 
diff -Nurp a/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi
--- a/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/omap-gpmc-smsc9221.dtsi	2018-10-21 14:13:55.802666942 +0200
@@ -6,7 +6,7 @@
  * or smsc 9218) has faster timings, leading to higher
  * bandwidth.
  *
- * Note that the board specifc DTS file needs to specify
+ * Note that the board specific DTS file needs to specify
  * ranges, pinctrl, reg, interrupt parent and interrupts.
  */
 
diff -Nurp a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
--- a/arch/arm/boot/dts/r8a7779.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/r8a7779.dtsi	2018-10-21 14:13:55.806666953 +0200
@@ -458,7 +458,7 @@
 		extal_clk: extal {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			/* This value must be overriden by the board. */
+			/* This value must be overridden by the board. */
 			clock-frequency = <0>;
 		};
 
diff -Nurp a/arch/arm/boot/dts/s3c6400.dtsi b/arch/arm/boot/dts/s3c6400.dtsi
--- a/arch/arm/boot/dts/s3c6400.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/s3c6400.dtsi	2018-10-21 14:13:55.814666974 +0200
@@ -5,7 +5,7 @@
  * Copyright (c) 2013 Tomasz Figa <tomasz.figa@xxxxxxxxx>
  *
  * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/boot/dts/s3c6410.dtsi b/arch/arm/boot/dts/s3c6410.dtsi
--- a/arch/arm/boot/dts/s3c6410.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/s3c6410.dtsi	2018-10-21 14:13:55.814666974 +0200
@@ -5,7 +5,7 @@
  * Copyright (c) 2013 Tomasz Figa <tomasz.figa@xxxxxxxxx>
  *
  * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/boot/dts/s3c64xx.dtsi b/arch/arm/boot/dts/s3c64xx.dtsi
--- a/arch/arm/boot/dts/s3c64xx.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/s3c64xx.dtsi	2018-10-21 14:13:55.814666974 +0200
@@ -6,7 +6,7 @@
  *
  * Samsung's S3C64xx SoC series device nodes are listed in this file.
  * Particular SoCs from S3C64xx series can include this file and provide
- * values for SoCs specfic bindings.
+ * values for SoCs specific bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
  * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
diff -Nurp a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
--- a/arch/arm/boot/dts/s5pv210.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/s5pv210.dtsi	2018-10-21 14:13:55.818666985 +0200
@@ -8,7 +8,7 @@
  * Tomasz Figa <t.figa@xxxxxxxxxxx>
  *
  * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
--- a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi	2018-10-21 14:13:55.818666985 +0200
@@ -8,7 +8,7 @@
  * Tomasz Figa <t.figa@xxxxxxxxxxx>
  *
  * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/arch/arm/include/asm/kvm_arm.h b/arch/arm/include/asm/kvm_arm.h
--- a/arch/arm/include/asm/kvm_arm.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/include/asm/kvm_arm.h	2018-10-21 14:13:55.818666985 +0200
@@ -62,7 +62,7 @@
  * TWE:		Trap WFE
  * TIDCP:	Trap L2CTLR/L2ECTLR
  * BSU_IS:	Upgrade barriers to the inner shareable domain
- * FB:		Force broadcast of all maintainance operations
+ * FB:		Force broadcast of all maintenance operations
  * AMO:		Override CPSR.A and enable signaling with VA
  * IMO:		Override CPSR.I and enable signaling with VI
  * FMO:		Override CPSR.F and enable signaling with VF
diff -Nurp a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
--- a/arch/arm/include/asm/thread_info.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/include/asm/thread_info.h	2018-10-21 14:13:55.818666985 +0200
@@ -48,7 +48,7 @@ struct cpu_context_save {
  */
 struct thread_info {
 	unsigned long		flags;		/* low level flags */
-	int			preempt_count;	/* 0 => preemptable, <0 => bug */
+	int			preempt_count;	/* 0 => preemptible, <0 => bug */
 	mm_segment_t		addr_limit;	/* address limit */
 	struct task_struct	*task;		/* main task structure */
 	__u32			cpu;		/* cpu */
diff -Nurp a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
--- a/arch/arm/include/asm/uaccess.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/include/asm/uaccess.h	2018-10-21 14:13:55.822666996 +0200
@@ -23,7 +23,7 @@
  * These two functions allow hooking accesses to userspace to increase
  * system integrity by ensuring that the kernel can not inadvertantly
  * perform such accesses (eg, via list poison values) which could then
- * be exploited for priviledge escalation.
+ * be exploited for privilege escalation.
  */
 static inline unsigned int uaccess_save_and_enable(void)
 {
diff -Nurp a/arch/arm/kernel/cpuidle.c b/arch/arm/kernel/cpuidle.c
--- a/arch/arm/kernel/cpuidle.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/kernel/cpuidle.c	2018-10-21 14:13:55.822666996 +0200
@@ -86,7 +86,7 @@ static const struct cpuidle_ops *__init
  * cpuidle_ops are tagged __initconst and will be unloaded after the init
  * process.
  *
- * Return 0 on sucess, -ENOENT if no 'enable-method' is defined, -EOPNOTSUPP if
+ * Return 0 on success, -ENOENT if no 'enable-method' is defined, -EOPNOTSUPP if
  * no cpuidle_ops is registered for the 'enable-method', or if either init or
  * suspend callback isn't defined.
  */
diff -Nurp a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
--- a/arch/arm/kernel/entry-header.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/kernel/entry-header.S	2018-10-21 14:13:55.822666996 +0200
@@ -76,7 +76,7 @@
 	.macro	v7m_exception_entry
 	@ determine the location of the registers saved by the core during
 	@ exception entry. Depending on the mode the cpu was in when the
-	@ exception happend that is either on the main or the process stack.
+	@ exception happened that is either on the main or the process stack.
 	@ Bit 2 of EXC_RETURN stored in the lr register specifies which stack
 	@ was used.
 	tst	lr, #EXC_RET_STACK_MASK
diff -Nurp a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
--- a/arch/arm/mach-davinci/board-dm355-evm.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-davinci/board-dm355-evm.c	2018-10-21 14:13:55.822666996 +0200
@@ -221,7 +221,7 @@ static struct v4l2_input tvp5146_inputs[
 
 /*
  * this is the route info for connecting each input to decoder
- * ouput that goes to vpfe. There is a one to one correspondence
+ * output that goes to vpfe. There is a one to one correspondence
  * with tvp5146_inputs
  */
 static struct vpfe_route tvp5146_routes[] = {
diff -Nurp a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
--- a/arch/arm/mach-davinci/board-dm365-evm.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-davinci/board-dm365-evm.c	2018-10-21 14:13:55.822666996 +0200
@@ -364,7 +364,7 @@ static struct v4l2_input tvp5146_inputs[
 
 /*
  * this is the route info for connecting each input to decoder
- * ouput that goes to vpfe. There is a one to one correspondence
+ * output that goes to vpfe. There is a one to one correspondence
  * with tvp5146_inputs
  */
 static struct vpfe_route tvp5146_routes[] = {
diff -Nurp a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
--- a/arch/arm/mach-davinci/board-dm644x-evm.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c	2018-10-21 14:13:55.822666996 +0200
@@ -255,7 +255,7 @@ static struct v4l2_input dm644xevm_tvp51
 
 /*
  * this is the route info for connecting each input to decoder
- * ouput that goes to vpfe. There is a one to one correspondence
+ * output that goes to vpfe. There is a one to one correspondence
  * with tvp5146_inputs
  */
 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
diff -Nurp a/arch/arm/mach-imx/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c
--- a/arch/arm/mach-imx/3ds_debugboard.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-imx/3ds_debugboard.c	2018-10-21 14:13:55.822666996 +0200
@@ -30,7 +30,7 @@
 #define UARTB_BASE_ADDR(n)	(n + 0x10000)
 
 #define BOARD_IO_ADDR(n)	(n + 0x20000)
-/* LED switchs */
+/* LED switches */
 #define LED_SWITCH_REG		0x00
 /* buttons */
 #define SWITCH_BUTTONS_REG	0x08
diff -Nurp a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
--- a/arch/arm/mach-imx/mm-imx3.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-imx/mm-imx3.c	2018-10-21 14:13:55.822666996 +0200
@@ -89,7 +89,7 @@ static void __init imx3_init_l2x0(void)
 
 /*
  * First of all, we must repair broken chip settings. There are some
- * i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
+ * i.MX35 CPUs in the wild, coming with bogus L2 cache settings. These
  * misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
  * Workaraound is to setup the correct register setting prior enabling the
  * L2 cache. This should not hurt already working CPUs, as they are using the
diff -Nurp a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
--- a/arch/arm/mach-imx/suspend-imx6.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-imx/suspend-imx6.S	2018-10-21 14:13:55.822666996 +0200
@@ -237,7 +237,7 @@ set_mmdc_io_lpm_done:
 	 * mask all GPC interrupts before
 	 * enabling the RBC counters to
 	 * avoid the counter starting too
-	 * early if an interupt is already
+	 * early if an interrupt is already
 	 * pending.
 	 */
 	ldr	r11, [r0, #PM_INFO_MX6Q_GPC_V_OFFSET]
diff -Nurp a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S	2018-10-21 14:13:55.822666996 +0200
@@ -97,7 +97,7 @@
 
 ENTRY(qwerty_fiqin_start)
 	@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
-	@ FIQ intrrupt handler
+	@ FIQ interrupt handler
 	ldr r12, omap_ih1_base			@ set pointer to level1 handler
 
 	ldr r11, [r12, #IRQ_MIR_REG_OFFSET]	@ fetch interrupts mask
diff -Nurp a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
--- a/arch/arm/mach-omap1/clock.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap1/clock.c	2018-10-21 14:13:55.822666996 +0200
@@ -531,7 +531,7 @@ static int omap1_clk_enable_uart_functio
 
 	ret = omap1_clk_enable_generic(clk);
 	if (ret == 0) {
-		/* Set smart idle acknowledgement mode */
+		/* Set smart idle acknowledgment mode */
 		uclk = (struct uart_clk *)clk;
 		omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8,
 			    uclk->sysc_addr);
@@ -545,7 +545,7 @@ static void omap1_clk_disable_uart_funct
 {
 	struct uart_clk *uclk;
 
-	/* Set force idle acknowledgement mode */
+	/* Set force idle acknowledgment mode */
 	uclk = (struct uart_clk *)clk;
 	omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr);
 
diff -Nurp a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
--- a/arch/arm/mach-omap2/dma.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap2/dma.c	2018-10-21 14:13:55.822666996 +0200
@@ -160,7 +160,7 @@ static unsigned configure_dma_errata(voi
 	/*
 	 * Erratum ID: i378: OMAP2+: sDMA Channel is not disabled
 	 * after a transaction error.
-	 * Workaround: SW should explicitely disable the channel.
+	 * Workaround: SW should explicitly disable the channel.
 	 */
 	if (cpu_class_is_omap2())
 		SET_DMA_ERRATA(DMA_ERRATA_i378);
diff -Nurp a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
--- a/arch/arm/mach-omap2/omap_hwmod.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap2/omap_hwmod.c	2018-10-21 14:13:55.822666996 +0200
@@ -1702,7 +1702,7 @@ static int _ocp_softreset(struct omap_hw
 		return -EINVAL;
 	}
 
-	/* For some modules, all optionnal clocks need to be enabled as well */
+	/* For some modules, all optional clocks need to be enabled as well */
 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
 		_enable_optional_clocks(oh);
 
diff -Nurp a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c	2018-10-21 14:13:55.822666996 +0200
@@ -261,7 +261,7 @@ static struct powerdomain cam_44xx_pwrdm
 	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
-/* l3init_44xx_pwrdm: L3 initators pheripherals power domain  */
+/* l3init_44xx_pwrdm: L3 initiators pheripherals power domain  */
 static struct powerdomain l3init_44xx_pwrdm = {
 	.name		  = "l3init_pwrdm",
 	.voltdm		  = { .name = "core" },
diff -Nurp a/arch/arm/mach-omap2/powerdomains54xx_data.c b/arch/arm/mach-omap2/powerdomains54xx_data.c
--- a/arch/arm/mach-omap2/powerdomains54xx_data.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap2/powerdomains54xx_data.c	2018-10-21 14:13:55.826667006 +0200
@@ -219,7 +219,7 @@ static struct powerdomain cam_54xx_pwrdm
 	.flags		  = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
-/* l3init_54xx_pwrdm: L3 initators pheripherals power domain  */
+/* l3init_54xx_pwrdm: L3 initiators pheripherals power domain  */
 static struct powerdomain l3init_54xx_pwrdm = {
 	.name		  = "l3init_pwrdm",
 	.voltdm		  = { .name = "core" },
diff -Nurp a/arch/arm/mach-omap2/powerdomains7xx_data.c b/arch/arm/mach-omap2/powerdomains7xx_data.c
--- a/arch/arm/mach-omap2/powerdomains7xx_data.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap2/powerdomains7xx_data.c	2018-10-21 14:13:55.822666996 +0200
@@ -226,7 +226,7 @@ static struct powerdomain mpu_7xx_pwrdm
 	},
 };
 
-/* l3init_7xx_pwrdm: L3 initators pheripherals power domain  */
+/* l3init_7xx_pwrdm: L3 initiators pheripherals power domain  */
 static struct powerdomain l3init_7xx_pwrdm = {
 	.name		  = "l3init_pwrdm",
 	.prcm_offs	  = DRA7XX_PRM_L3INIT_INST,
diff -Nurp a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
--- a/arch/arm/mach-omap2/sleep34xx.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-omap2/sleep34xx.S	2018-10-21 14:13:55.826667006 +0200
@@ -477,7 +477,7 @@ l2_inv_gp:
 	mov	r12, #0x2
 	smc	#0			@ Call SMI monitor (smieq)
 logic_l1_restore:
-	adr	r0, l2dis_3630_offset	@ adress for offset
+	adr	r0, l2dis_3630_offset	@ address for offset
 	ldr	r1, [r0]		@ value for offset
 	ldr	r1, [r0, r1]		@ value at l2dis_3630
 	cmp	r1, #0x1		@ Test if L2 re-enable needed on 3630
diff -Nurp a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
--- a/arch/arm/mach-rockchip/platsmp.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-rockchip/platsmp.c	2018-10-21 14:13:55.826667006 +0200
@@ -146,7 +146,7 @@ static int rockchip_boot_secondary(unsig
 		/*
 		 * We communicate with the bootrom to active the cpus other
 		 * than cpu0, after a blob of initialize code, they will
-		 * stay at wfe state, once they are actived, they will check
+		 * stay at wfe state, once they are activated, they will check
 		 * the mailbox:
 		 * sram_base_addr + 4: 0xdeadbeaf
 		 * sram_base_addr + 8: start address for pc
diff -Nurp a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
--- a/arch/arm/mach-sti/Kconfig	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-sti/Kconfig	2018-10-21 14:13:59.034675442 +0200
@@ -49,7 +49,7 @@ config SOC_STIH407
 	select STIH407_RESET
 	help
 	  This enables support for STMicroelectronics Digital Consumer
-	  Electronics family StiH407 parts, targetted at set-top-box
+	  Electronics family StiH407 parts, targeted at set-top-box
 	  and other digital audio/video applications using Flattened Device
 	  Trees.
 
diff -Nurp a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
--- a/arch/arm/mach-tegra/pm.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mach-tegra/pm.c	2018-10-21 14:13:59.102675621 +0200
@@ -228,7 +228,7 @@ static int tegra_sleep_core(unsigned lon
  * tegra_lp1_iram_hook
  *
  * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
- * SDRAM. These codes not be copied to IRAM in this fuction. We need to
+ * SDRAM. These codes not be copied to IRAM in this function. We need to
  * copy these code to IRAM before LP0/LP1 suspend and restore the content
  * of IRAM after resume.
  */
diff -Nurp a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
--- a/arch/arm/mm/cache-l2x0.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mm/cache-l2x0.c	2018-10-21 14:13:59.102675621 +0200
@@ -1384,7 +1384,7 @@ static void aurora_pa_range(unsigned lon
 	unsigned long flags;
 
 	/*
-	 * round start and end adresses up to cache line size
+	 * round start and end addresses up to cache line size
 	 */
 	start &= ~(CACHE_LINE_SIZE - 1);
 	end = ALIGN(end, CACHE_LINE_SIZE);
diff -Nurp a/arch/arm/mm/context.c b/arch/arm/mm/context.c
--- a/arch/arm/mm/context.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mm/context.c	2018-10-21 14:13:59.102675621 +0200
@@ -79,7 +79,7 @@ void a15_erratum_get_cpumask(int this_cp
 
 #ifdef CONFIG_ARM_LPAE
 /*
- * With LPAE, the ASID and page tables are updated atomicly, so there is
+ * With LPAE, the ASID and page tables are updated atomically, so there is
  * no need for a reserved set of tables (the active ASID tracking prevents
  * any issues across a rollover).
  */
@@ -247,7 +247,7 @@ void check_and_switch_context(struct mm_
 		__check_vmalloc_seq(mm);
 
 	/*
-	 * We cannot update the pgd and the ASID atomicly with classic
+	 * We cannot update the pgd and the ASID atomically with classic
 	 * MMU, so switch exclusively to global mappings to avoid
 	 * speculative page table walking with the wrong TTBR.
 	 */
diff -Nurp a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c
--- a/arch/arm/mm/dma-mapping-nommu.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/mm/dma-mapping-nommu.c	2018-10-21 14:13:59.102675621 +0200
@@ -222,7 +222,7 @@ void arch_setup_dma_ops(struct device *d
 		/*
 		 * Cache support for v7m is optional, so can be treated as
 		 * coherent if no cache has been detected. Note that it is not
-		 * enough to check if MPU is in use or not since in absense of
+		 * enough to check if MPU is in use or not since in absence of
 		 * MPU system memory map is used.
 		 */
 		dev->archdata.dma_coherent = (cacheid) ? coherent : true;
diff -Nurp a/arch/arm/plat-samsung/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h
--- a/arch/arm/plat-samsung/include/plat/cpu-freq.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq.h	2018-10-21 14:14:00.878680291 +0200
@@ -101,7 +101,7 @@ struct s3c_pllval {
  * @need_io: Set if the board has external IO on any of the chipselect
  *	lines that will require the hardware timing registers to be
  *	updated on a clock change.
- * @max: The maxium frequency limits for the system. Any field that
+ * @max: The maximum frequency limits for the system. Any field that
  *	is left at zero will use the CPU's settings.
  *
  * This contains the board specific settings that affect how the CPU
diff -Nurp a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h	2018-10-21 14:14:00.878680291 +0200
@@ -36,7 +36,7 @@ struct samsung_gpio_chip;
  * @get_config: Read the current configuration for the GPIO
  *
  * Each chip can have more than one type of GPIO bank available and some
- * have different capabilites even when they have the same control register
+ * have different capabilities even when they have the same control register
  * layouts. Provide an point to vector control routine and provide any
  * per-bank configuration information that other systems such as the
  * external interrupt code will need.
diff -Nurp a/arch/arm/probes/decode-arm.c b/arch/arm/probes/decode-arm.c
--- a/arch/arm/probes/decode-arm.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/probes/decode-arm.c	2018-10-21 14:14:00.878680291 +0200
@@ -41,7 +41,7 @@
  * By having all behavior of the kprobe'd instruction completed before
  * returning from the kprobe_handler(), all locks (scheduler and
  * interrupt) can safely be released.  There is no need for secondary
- * breakpoints, no race with MP or preemptable kernels, nor having to
+ * breakpoints, no race with MP or preemptible kernels, nor having to
  * clean up resources counts at a later time impacting overall system
  * performance.  By rewriting the instruction, only the minimum registers
  * need to be loaded and saved back optimizing performance.
diff -Nurp a/arch/arm/probes/decode.h b/arch/arm/probes/decode.h
--- a/arch/arm/probes/decode.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/probes/decode.h	2018-10-21 14:14:00.878680291 +0200
@@ -282,7 +282,7 @@ enum decode_reg_type {
 	REG_TYPE_NOPCWB,   /* No PC if load/store write-back flag also set */
 
 	/* The following types are used when the encoding for PC indicates
-	 * another instruction form. This distiction only matters for test
+	 * another instruction form. This distinction only matters for test
 	 * case coverage checks.
 	 */
 	REG_TYPE_NOPCX,	   /* Register must not be PC */
diff -Nurp a/arch/arm/probes/kprobes/opt-arm.c b/arch/arm/probes/kprobes/opt-arm.c
--- a/arch/arm/probes/kprobes/opt-arm.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/probes/kprobes/opt-arm.c	2018-10-21 14:14:00.878680291 +0200
@@ -225,11 +225,11 @@ int arch_prepare_optimized_kprobe(struct
 	 *
 	 * So the maximum forward branch should be:
 	 *   (0x007fffff << 2) = 0x01fffffc =  0x1fffffc
-	 * The maximum backword branch should be:
+	 * The maximum backward branch should be:
 	 *   (0xff800000 << 2) = 0xfe000000 = -0x2000000
 	 *
 	 * We can simply check (rel & 0xfe000003):
-	 *  if rel is positive, (rel & 0xfe000000) shoule be 0
+	 *  if rel is positive, (rel & 0xfe000000) should be 0
 	 *  if rel is negitive, (rel & 0xfe000000) should be 0xfe000000
 	 *  the last '3' is used for alignment checking.
 	 */
diff -Nurp a/arch/arm/probes/kprobes/test-core.c b/arch/arm/probes/kprobes/test-core.c
--- a/arch/arm/probes/kprobes/test-core.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/probes/kprobes/test-core.c	2018-10-21 14:14:00.878680291 +0200
@@ -128,7 +128,7 @@
  *	.byte	ARG_TYPE_END
  *	.byte	TEST_ISA	@ flags, including ISA being tested
  *	.short	50f-0f		@ offset of 'test_before'
- *	.short	2f-0f		@ offset of 'test_after2' (if relevent)
+ *	.short	2f-0f		@ offset of 'test_after2' (if relevant)
  *	.short	99f-0f		@ offset of 'test_done'
  *	@ start of test case code...
  *	0:
diff -Nurp a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
--- a/arch/arm/xen/hypercall.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm/xen/hypercall.S	2018-10-21 14:14:00.878680291 +0200
@@ -32,9 +32,9 @@
 
 /*
  * The Xen hypercall calling convention is very similar to the ARM
- * procedure calling convention: the first paramter is passed in r0, the
+ * procedure calling convention: the first parameter is passed in r0, the
  * second in r1, the third in r2 and the fourth in r3. Considering that
- * Xen hypercalls have 5 arguments at most, the fifth paramter is passed
+ * Xen hypercalls have 5 arguments at most, the fifth parameter is passed
  * in r4, differently from the procedure calling convention of using the
  * stack for that case.
  *
diff -Nurp a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h
--- a/arch/arm64/include/asm/cpu_ops.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm64/include/asm/cpu_ops.h	2018-10-21 14:13:53.378660571 +0200
@@ -32,7 +32,7 @@
  *		mechanism for doing so, tests whether it is possible to boot
  *		the given CPU.
  * @cpu_boot:	Boots a cpu into the kernel.
- * @cpu_postboot: Optionally, perform any post-boot cleanup or necesary
+ * @cpu_postboot: Optionally, perform any post-boot cleanup or necessary
  *		synchronisation. Called from the cpu being booted.
  * @cpu_disable: Prepares a cpu to die. May fail for some mechanism-specific
  * 		reason, which will cause the hot unplug to be aborted. Called
diff -Nurp a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
--- a/arch/arm64/include/asm/kvm_arm.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm64/include/asm/kvm_arm.h	2018-10-21 14:13:53.378660571 +0200
@@ -76,7 +76,7 @@
  * TWI:		Trap WFI
  * TIDCP:	Trap L2CTLR/L2ECTLR
  * BSU_IS:	Upgrade barriers to the inner shareable domain
- * FB:		Force broadcast of all maintainance operations
+ * FB:		Force broadcast of all maintenance operations
  * AMO:		Override CPSR.A and enable signaling with VA
  * IMO:		Override CPSR.I and enable signaling with VI
  * FMO:		Override CPSR.F and enable signaling with VF
diff -Nurp a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
--- a/arch/arm64/include/asm/memory.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm64/include/asm/memory.h	2018-10-21 14:13:53.378660571 +0200
@@ -220,7 +220,7 @@ static inline unsigned long kaslr_offset
 
 
 /*
- * The linear kernel range starts in the middle of the virtual adddress
+ * The linear kernel range starts in the middle of the virtual address
  * space. Testing the top bit for the start of the region is a
  * sufficient check.
  */
diff -Nurp a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
--- a/arch/arm64/include/asm/thread_info.h	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm64/include/asm/thread_info.h	2018-10-21 14:13:53.378660571 +0200
@@ -42,7 +42,7 @@ struct thread_info {
 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
 	u64			ttbr0;		/* saved TTBR0_EL1 */
 #endif
-	int			preempt_count;	/* 0 => preemptable, <0 => bug */
+	int			preempt_count;	/* 0 => preemptible, <0 => bug */
 };
 
 #define thread_saved_pc(tsk)	\
diff -Nurp a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c
--- a/arch/arm64/kernel/smp_spin_table.c	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm64/kernel/smp_spin_table.c	2018-10-21 14:13:55.774666867 +0200
@@ -94,9 +94,9 @@ static int smp_spin_table_cpu_prepare(un
 
 	/*
 	 * We write the release address as LE regardless of the native
-	 * endianess of the kernel. Therefore, any boot-loaders that
+	 * endianness of the kernel. Therefore, any boot-loaders that
 	 * read this address need to convert this address to the
-	 * boot-loader's endianess before jumping. This is mandated by
+	 * boot-loader's endianness before jumping. This is mandated by
 	 * the boot protocol.
 	 */
 	writeq_relaxed(__pa_symbol(secondary_holding_pen), release_addr);
diff -Nurp a/arch/arm64/lib/strcmp.S b/arch/arm64/lib/strcmp.S
--- a/arch/arm64/lib/strcmp.S	2018-10-15 07:20:24.000000000 +0200
+++ b/arch/arm64/lib/strcmp.S	2018-10-21 14:13:55.774666867 +0200
@@ -89,7 +89,7 @@ ENTRY(strcmp)
 	/*
 	* Sources are mutually aligned, but are not currently at an
 	* alignment boundary.  Round down the addresses and then mask off
-	* the bytes that preceed the start point.
+	* the bytes that precede the start point.
 	*/
 	bic	src1, src1, #7
 	bic	src2, src2, #7
diff -Nurp a/Documentation/arm/Interrupts b/Documentation/arm/Interrupts
--- a/Documentation/arm/Interrupts	2018-10-15 07:20:24.000000000 +0200
+++ b/Documentation/arm/Interrupts	2018-10-21 14:14:00.878680291 +0200
@@ -145,7 +145,7 @@ So, what's changed?
 
 4. Direct access to SA1111 INTPOL is deprecated.  Use set_irq_type instead.
 
-5. A handler is expected to perform any necessary acknowledgement of the
+5. A handler is expected to perform any necessary acknowledgment of the
    parent IRQ via the correct chip specific function.  For instance, if
    the SA1111 is directly connected to a SA1110 GPIO, then you should
    acknowledge the SA1110 IRQ each time you re-read the SA1111 IRQ status.
diff -Nurp a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt
--- a/Documentation/arm64/booting.txt	2018-10-15 07:20:24.000000000 +0200
+++ b/Documentation/arm64/booting.txt	2018-10-21 14:14:00.878680291 +0200
@@ -222,7 +222,7 @@ following manner:
 
 - CPUs with a "spin-table" enable-method must have a 'cpu-release-addr'
   property in their cpu node.  This property identifies a
-  naturally-aligned 64-bit zero-initalised memory location.
+  naturally-aligned 64-bit zero-initialized memory location.
 
   These CPUs should spin outside of the kernel in a reserved area of
   memory (communicated to the kernel by a /memreserve/ region in the
diff -Nurp a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
--- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt	2018-10-15 07:20:24.000000000 +0200
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt	2018-10-21 14:14:00.878680291 +0200
@@ -62,7 +62,7 @@ Vendor-specific bindings
 ------------------------
 
 The Mali GPU is integrated very differently from one SoC to
-another. In order to accomodate those differences, you have the option
+another. In order to accommodate those differences, you have the option
 to specify one more vendor-specific compatible, among:
 
   - allwinner,sun4i-a10-mali
diff -Nurp a/drivers/macintosh/windfarm_lm75_sensor.c b/drivers/macintosh/windfarm_lm75_sensor.c
--- a/drivers/macintosh/windfarm_lm75_sensor.c	2018-10-15 07:20:24.000000000 +0200
+++ b/drivers/macintosh/windfarm_lm75_sensor.c	2018-10-21 14:14:00.878680291 +0200
@@ -104,7 +104,7 @@ static int wf_lm75_probe(struct i2c_clie
 		return -ENXIO;
 	}
 
-	/* Usual rant about sensor names not beeing very consistent in
+	/* Usual rant about sensor names not being very consistent in
 	 * the device-tree, oh well ...
 	 * Add more entries below as you deal with more setups
 	 */
diff -Nurp a/drivers/macintosh/windfarm_pm81.c b/drivers/macintosh/windfarm_pm81.c
--- a/drivers/macintosh/windfarm_pm81.c	2018-10-15 07:20:24.000000000 +0200
+++ b/drivers/macintosh/windfarm_pm81.c	2018-10-21 14:14:00.878680291 +0200
@@ -737,7 +737,7 @@ static int wf_smu_remove(struct platform
 
 	/* Release all sensors */
 	/* One more crappy race: I don't think we have any guarantee here
-	 * that the attribute callback won't race with the sensor beeing
+	 * that the attribute callback won't race with the sensor being
 	 * disposed of, and I'm not 100% certain what best way to deal
 	 * with that except by adding locks all over... I'll do that
 	 * eventually but heh, who ever rmmod this module anyway ?
diff -Nurp a/drivers/macintosh/windfarm_pm91.c b/drivers/macintosh/windfarm_pm91.c
--- a/drivers/macintosh/windfarm_pm91.c	2018-10-15 07:20:24.000000000 +0200
+++ b/drivers/macintosh/windfarm_pm91.c	2018-10-21 14:14:00.878680291 +0200
@@ -659,7 +659,7 @@ static int wf_smu_remove(struct platform
 
 	/* Release all sensors */
 	/* One more crappy race: I don't think we have any guarantee here
-	 * that the attribute callback won't race with the sensor beeing
+	 * that the attribute callback won't race with the sensor being
 	 * disposed of, and I'm not 100% certain what best way to deal
 	 * with that except by adding locks all over... I'll do that
 	 * eventually but heh, who ever rmmod this module anyway ?
diff -Nurp a/drivers/scsi/arm/fas216.c b/drivers/scsi/arm/fas216.c
--- a/drivers/scsi/arm/fas216.c	2018-10-15 07:20:24.000000000 +0200
+++ b/drivers/scsi/arm/fas216.c	2018-10-21 14:14:00.878680291 +0200
@@ -405,7 +405,7 @@ static void print_debug_list(void)
 static void fas216_done(FAS216_Info *info, unsigned int result);
 
 /**
- * fas216_get_last_msg - retrive last message from the list
+ * fas216_get_last_msg - retrieve last message from the list
  * @info: interface to search
  * @pos: current fifo position
  *
@@ -2462,7 +2462,7 @@ int fas216_eh_abort(struct scsi_cmnd *SC
 
 /**
  * fas216_eh_device_reset - Reset the device associated with this command
- * @SCpnt: command specifing device to reset
+ * @SCpnt: command specifying device to reset
  *
  * Reset the device associated with this command.
  * Returns: FAILED if unable to reset.
@@ -2544,7 +2544,7 @@ int fas216_eh_device_reset(struct scsi_c
 
 /**
  * fas216_eh_bus_reset - Reset the bus associated with the command
- * @SCpnt: command specifing bus to reset
+ * @SCpnt: command specifying bus to reset
  *
  * Reset the bus associated with the command.
  * Returns: FAILED if unable to reset.
@@ -2644,7 +2644,7 @@ static void fas216_init_chip(FAS216_Info
 
 /**
  * fas216_eh_host_reset - Reset the host associated with this command
- * @SCpnt: command specifing host to reset
+ * @SCpnt: command specifying host to reset
  *
  * Reset the host associated with this command.
  * Returns: FAILED if unable to reset.
diff -Nurp a/drivers/scsi/arm/fas216.h b/drivers/scsi/arm/fas216.h
--- a/drivers/scsi/arm/fas216.h	2018-10-15 07:20:24.000000000 +0200
+++ b/drivers/scsi/arm/fas216.h	2018-10-21 14:14:00.878680291 +0200
@@ -371,21 +371,21 @@ extern int fas216_eh_abort(struct scsi_c
 
 /* Function: int fas216_eh_device_reset(struct scsi_cmnd *SCpnt)
  * Purpose : Reset the device associated with this command
- * Params  : SCpnt - command specifing device to reset
+ * Params  : SCpnt - command specifying device to reset
  * Returns : FAILED if unable to reset
  */
 extern int fas216_eh_device_reset(struct scsi_cmnd *SCpnt);
 
 /* Function: int fas216_eh_bus_reset(struct scsi_cmnd *SCpnt)
  * Purpose : Reset the complete bus associated with this command
- * Params  : SCpnt - command specifing bus to reset
+ * Params  : SCpnt - command specifying bus to reset
  * Returns : FAILED if unable to reset
  */
 extern int fas216_eh_bus_reset(struct scsi_cmnd *SCpnt);
 
 /* Function: int fas216_eh_host_reset(struct scsi_cmnd *SCpnt)
  * Purpose : Reset the host associated with this command
- * Params  : SCpnt - command specifing host to reset
+ * Params  : SCpnt - command specifying host to reset
  * Returns : FAILED if unable to reset
  */
 extern int fas216_eh_host_reset(struct scsi_cmnd *SCpnt);
diff -Nurp a/include/xen/arm/page-coherent.h b/include/xen/arm/page-coherent.h
--- a/include/xen/arm/page-coherent.h	2018-10-15 07:20:24.000000000 +0200
+++ b/include/xen/arm/page-coherent.h	2018-10-21 14:14:00.878680291 +0200
@@ -68,7 +68,7 @@ static inline void xen_dma_unmap_page(st
 {
 	unsigned long pfn = PFN_DOWN(handle);
 	/*
-	 * Dom0 is mapped 1:1, while the Linux page can be spanned accross
+	 * Dom0 is mapped 1:1, while the Linux page can be spanned across
 	 * multiple Xen page, it's not possible to have a mix of local and
 	 * foreign Xen page. Dom0 is mapped 1:1, so calling pfn_valid on a
 	 * foreign mfn will always return false. If the page is local we can
diff -Nurp a/scripts/dtc/include-prefixes/arm/exynos3250.dtsi b/scripts/dtc/include-prefixes/arm/exynos3250.dtsi
--- a/scripts/dtc/include-prefixes/arm/exynos3250.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/exynos3250.dtsi	2018-10-21 14:13:55.782666889 +0200
@@ -6,7 +6,7 @@
  *		http://www.samsung.com
  *
  * Samsung's Exynos3250 SoC device nodes are listed in this file. Exynos3250
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/scripts/dtc/include-prefixes/arm/exynos4210.dtsi b/scripts/dtc/include-prefixes/arm/exynos4210.dtsi
--- a/scripts/dtc/include-prefixes/arm/exynos4210.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/exynos4210.dtsi	2018-10-21 14:13:55.782666889 +0200
@@ -8,7 +8,7 @@
  *		www.linaro.org
  *
  * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/scripts/dtc/include-prefixes/arm/exynos4412.dtsi b/scripts/dtc/include-prefixes/arm/exynos4412.dtsi
--- a/scripts/dtc/include-prefixes/arm/exynos4412.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/exynos4412.dtsi	2018-10-21 14:13:55.782666889 +0200
@@ -6,7 +6,7 @@
  *		http://www.samsung.com
  *
  * Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/scripts/dtc/include-prefixes/arm/exynos4.dtsi b/scripts/dtc/include-prefixes/arm/exynos4.dtsi
--- a/scripts/dtc/include-prefixes/arm/exynos4.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/exynos4.dtsi	2018-10-21 14:13:55.774666867 +0200
@@ -9,7 +9,7 @@
  *
  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  * SoCs from Exynos4 series can include this file and provide values for SoCs
- * specfic bindings.
+ * specific bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
diff -Nurp a/scripts/dtc/include-prefixes/arm/exynos5250.dtsi b/scripts/dtc/include-prefixes/arm/exynos5250.dtsi
--- a/scripts/dtc/include-prefixes/arm/exynos5250.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/exynos5250.dtsi	2018-10-21 14:13:55.786666899 +0200
@@ -7,7 +7,7 @@
  *
  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
  * EXYNOS5250 based board files can include this file and provide
- * values for board specfic bindings.
+ * values for board specific bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
diff -Nurp a/scripts/dtc/include-prefixes/arm/integratorap.dts b/scripts/dtc/include-prefixes/arm/integratorap.dts
--- a/scripts/dtc/include-prefixes/arm/integratorap.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/integratorap.dts	2018-10-21 14:13:55.790666910 +0200
@@ -20,7 +20,7 @@
 			/*
 			 * Since the board has pluggable CPU modules, we
 			 * cannot define a proper compatible here. Let the
-			 * boot loader fill in the apropriate compatible
+			 * boot loader fill in the appropriate compatible
 			 * string if necessary.
 			 */
 			/* compatible = "arm,arm926ej-s"; */
diff -Nurp a/scripts/dtc/include-prefixes/arm/integratorcp.dts b/scripts/dtc/include-prefixes/arm/integratorcp.dts
--- a/scripts/dtc/include-prefixes/arm/integratorcp.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/integratorcp.dts	2018-10-21 14:13:55.794666921 +0200
@@ -23,7 +23,7 @@
 			/*
 			 * Since the board has pluggable CPU modules, we
 			 * cannot define a proper compatible here. Let the
-			 * boot loader fill in the apropriate compatible
+			 * boot loader fill in the appropriate compatible
 			 * string if necessary.
 			 */
 			/* compatible = "arm,arm920t"; */
diff -Nurp a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6192.dts b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6192.dts
--- a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6192.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6192.dts	2018-10-21 14:13:55.794666921 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6192 Board descrition
+ * Marvell RD88F6192 Board description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-a.dts b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-a.dts
--- a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-a.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-a.dts	2018-10-21 14:13:55.798666931 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6181 A Board descrition
+ * Marvell RD88F6181 A Board description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281.dtsi b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281.dtsi
--- a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281.dtsi	2018-10-21 14:13:55.798666931 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6181 Common Board descrition
+ * Marvell RD88F6181 Common Board description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-z0.dts b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-z0.dts
--- a/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-z0.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/kirkwood-rd88f6281-z0.dts	2018-10-21 14:13:55.798666931 +0200
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Marvell RD88F6181 Z0 stepping descrition
+ * Marvell RD88F6181 Z0 stepping description
  *
  * Andrew Lunn <andrew@xxxxxxx>
  *
diff -Nurp a/scripts/dtc/include-prefixes/arm/mmp2-brownstone.dts b/scripts/dtc/include-prefixes/arm/mmp2-brownstone.dts
--- a/scripts/dtc/include-prefixes/arm/mmp2-brownstone.dts	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/mmp2-brownstone.dts	2018-10-21 14:13:55.802666942 +0200
@@ -30,7 +30,7 @@
 			twsi1: i2c@d4011000 {
 				status = "okay";
 				pmic: max8925@3c {
-					compatible = "maxium,max8925";
+					compatible = "maximum,max8925";
 					reg = <0x3c>;
 					interrupts = <1>;
 					interrupt-parent = <&intcmux4>;
diff -Nurp a/scripts/dtc/include-prefixes/arm/omap3-panel-sharp-ls037v7dw01.dtsi b/scripts/dtc/include-prefixes/arm/omap3-panel-sharp-ls037v7dw01.dtsi
--- a/scripts/dtc/include-prefixes/arm/omap3-panel-sharp-ls037v7dw01.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/omap3-panel-sharp-ls037v7dw01.dtsi	2018-10-21 14:13:55.802666942 +0200
@@ -2,7 +2,7 @@
 /*
  * Common file for omap dpi panels with QVGA and reset pins
  *
- * Note that the board specifc DTS file needs to specify
+ * Note that the board specific DTS file needs to specify
  * at minimum the GPIO enable-gpios for display, and
  * gpios for gpio-backlight.
  */
diff -Nurp a/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc911x.dtsi b/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc911x.dtsi
--- a/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc911x.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc911x.dtsi	2018-10-21 14:13:55.802666942 +0200
@@ -2,7 +2,7 @@
 /*
  * Common file for GPMC connected smsc911x on omaps
  *
- * Note that the board specifc DTS file needs to specify
+ * Note that the board specific DTS file needs to specify
  * ranges, pinctrl, reg, interrupt parent and interrupts.
  */
 
diff -Nurp a/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc9221.dtsi b/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc9221.dtsi
--- a/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc9221.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/omap-gpmc-smsc9221.dtsi	2018-10-21 14:13:55.802666942 +0200
@@ -6,7 +6,7 @@
  * or smsc 9218) has faster timings, leading to higher
  * bandwidth.
  *
- * Note that the board specifc DTS file needs to specify
+ * Note that the board specific DTS file needs to specify
  * ranges, pinctrl, reg, interrupt parent and interrupts.
  */
 
diff -Nurp a/scripts/dtc/include-prefixes/arm/r8a7779.dtsi b/scripts/dtc/include-prefixes/arm/r8a7779.dtsi
--- a/scripts/dtc/include-prefixes/arm/r8a7779.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/r8a7779.dtsi	2018-10-21 14:13:55.806666953 +0200
@@ -458,7 +458,7 @@
 		extal_clk: extal {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			/* This value must be overriden by the board. */
+			/* This value must be overridden by the board. */
 			clock-frequency = <0>;
 		};
 
diff -Nurp a/scripts/dtc/include-prefixes/arm/s3c6400.dtsi b/scripts/dtc/include-prefixes/arm/s3c6400.dtsi
--- a/scripts/dtc/include-prefixes/arm/s3c6400.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/s3c6400.dtsi	2018-10-21 14:13:55.814666974 +0200
@@ -5,7 +5,7 @@
  * Copyright (c) 2013 Tomasz Figa <tomasz.figa@xxxxxxxxx>
  *
  * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/scripts/dtc/include-prefixes/arm/s3c6410.dtsi b/scripts/dtc/include-prefixes/arm/s3c6410.dtsi
--- a/scripts/dtc/include-prefixes/arm/s3c6410.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/s3c6410.dtsi	2018-10-21 14:13:55.814666974 +0200
@@ -5,7 +5,7 @@
  * Copyright (c) 2013 Tomasz Figa <tomasz.figa@xxxxxxxxx>
  *
  * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/scripts/dtc/include-prefixes/arm/s3c64xx.dtsi b/scripts/dtc/include-prefixes/arm/s3c64xx.dtsi
--- a/scripts/dtc/include-prefixes/arm/s3c64xx.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/s3c64xx.dtsi	2018-10-21 14:13:55.814666974 +0200
@@ -6,7 +6,7 @@
  *
  * Samsung's S3C64xx SoC series device nodes are listed in this file.
  * Particular SoCs from S3C64xx series can include this file and provide
- * values for SoCs specfic bindings.
+ * values for SoCs specific bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
  * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
diff -Nurp a/scripts/dtc/include-prefixes/arm/s5pv210.dtsi b/scripts/dtc/include-prefixes/arm/s5pv210.dtsi
--- a/scripts/dtc/include-prefixes/arm/s5pv210.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/s5pv210.dtsi	2018-10-21 14:13:55.818666985 +0200
@@ -8,7 +8,7 @@
  * Tomasz Figa <t.figa@xxxxxxxxxxx>
  *
  * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in
diff -Nurp a/scripts/dtc/include-prefixes/arm/s5pv210-pinctrl.dtsi b/scripts/dtc/include-prefixes/arm/s5pv210-pinctrl.dtsi
--- a/scripts/dtc/include-prefixes/arm/s5pv210-pinctrl.dtsi	2018-10-15 07:20:24.000000000 +0200
+++ b/scripts/dtc/include-prefixes/arm/s5pv210-pinctrl.dtsi	2018-10-21 14:13:55.818666985 +0200
@@ -8,7 +8,7 @@
  * Tomasz Figa <t.figa@xxxxxxxxxxx>
  *
  * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
- * based board files can include this file and provide values for board specfic
+ * based board files can include this file and provide values for board specific
  * bindings.
  *
  * Note: This file does not include device nodes for all the controllers in




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