On Fri, Aug 10, 2018 at 09:59:46PM +0530, dkota@xxxxxxxxxxxxxx wrote: > Now the need is, how to communicate the SPI controller maximum frequency to > SPI core framework? > Is it by DTSI entry or hardcoding in the SPI controller driver? If you've got a limit that exists in the IP the hard code it in the driver. > My stand is for providing the DTSI entry. > Why because, this keeps SPI controller driver generic across the boards and > portable. > Also it is not against to Device tree usage because maximum frequency > is describing the property of the hardware. If the limit the controller has is not coming from the clock tree then presumably it's a physical limitation of the silicon and isn't going to vary per board. If the limit is coming from the board then it should be specified per slave since different slaves may have different requirements on different boards.
Attachment:
signature.asc
Description: PGP signature
