On 6/22/2018 2:01 PM, Ard Biesheuvel wrote: >> Yes, it is part of the PCI I/O protocol definition. FrameBufferBase is >> described as >> >> """ >> Base address of graphics linear frame buffer. Info contains >> information required to allow software to draw directly to the >> frame buffer without using Blt().Offset zero in >> FrameBufferBase represents the upper left pixel of the >> display. >> """ > I just tried AMD Radeon and NVidia graphics cards on a system with > non-1:1 mapped MMIO windows, and in both cases, the GOP protocol > structure is populated correctly, i.e., using the CPU address not the > PCIe address. > > EDK2 only recently gained support for MMIO translation in the host > bridge driver, so I so wonder if this is a platform issue rather than > a driver issue. It may be worth a try to dump the results of > GetBarAttributes() of all PCI I/O protocol instances (either in UEFI > or in the stub), to double check that the correct values are returned. > Thanks for checking out other platforms. I'll mark the issue as a BIOS issue and bounce your feedback to the BIOS provider. Let's hold onto this patch for the moment. -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
