This can be accomplished via /dev/mem
Signed-off-by: Sean Paul <seanpaul@xxxxxxxxxxxx>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 +-
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 +-
drivers/gpu/drm/msm/dpu_dbg.c | 34 +++----------------
4 files changed, 7 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 6aad40dccb05..5ff627827be9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1563,7 +1563,7 @@ void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc)
rc = ctl->ops.reset(ctl);
if (rc) {
DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n", ctl->idx);
- DPU_DBG_DUMP("all", "dbg_bus", "vbif_dbg_bus", "panic");
+ DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus", "panic");
}
phys_enc->enable_state = DPU_ENC_ENABLED;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index eb9314aaa85f..5589d1289da9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -262,7 +262,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout(
atomic_read(&phys_enc->pending_kickoff_cnt));
dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR);
- DPU_DBG_DUMP("all", "dbg_bus", "vbif_dbg_bus", "panic");
+ DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus", "panic");
}
atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index fc83745b48fa..8ac7f0537c05 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -638,7 +638,7 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff(
DPU_ERROR_VIDENC(vid_enc, "ctl %d reset failure: %d\n",
ctl->idx, rc);
dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_VSYNC);
- DPU_DBG_DUMP("all", "dbg_bus", "vbif_dbg_bus", "panic");
+ DPU_DBG_DUMP("dbg_bus", "vbif_dbg_bus", "panic");
}
}
diff --git a/drivers/gpu/drm/msm/dpu_dbg.c b/drivers/gpu/drm/msm/dpu_dbg.c
index 9495a0f17f1b..813f6f3ff773 100644
--- a/drivers/gpu/drm/msm/dpu_dbg.c
+++ b/drivers/gpu/drm/msm/dpu_dbg.c
@@ -174,7 +174,6 @@ struct dpu_dbg_vbif_debug_bus {
* @enable_reg_dump: whether to dump registers into memory, kernel log, or both
* @dbgbus_dpu: debug bus structure for the dpu
* @dbgbus_vbif_rt: debug bus structure for the realtime vbif
- * @dump_all: dump all entries in register dump
* @dsi_dbg_bus: dump dsi debug bus register
*/
static struct dpu_dbg_base {
@@ -190,7 +189,6 @@ static struct dpu_dbg_base {
struct dpu_dbg_dpu_debug_bus dbgbus_dpu;
struct dpu_dbg_vbif_debug_bus dbgbus_vbif_rt;
- bool dump_all;
bool dsi_dbg_bus;
} dpu_dbg_base;
@@ -2207,22 +2205,6 @@ static void _dpu_dump_reg_by_blk(const char *blk_name)
}
}
-/**
- * _dpu_dump_reg_all - dump all register regions
- */
-static void _dpu_dump_reg_all(void)
-{
- struct dpu_dbg_base *dbg_base = &dpu_dbg_base;
- struct dpu_dbg_reg_base *blk_base;
-
- if (!dbg_base)
- return;
-
- list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head)
- if (strlen(blk_base->name))
- _dpu_dump_reg_by_blk(blk_base->name);
-}
-
/**
* _dpu_dump_get_blk_addr - retrieve register block address by name
* @blk_name: register blk name
@@ -2517,13 +2499,11 @@ static void _dpu_dbg_dump_vbif_dbg_bus(struct dpu_dbg_vbif_debug_bus *bus)
*/
static void _dpu_dump_array(struct dpu_dbg_reg_base *blk_arr[],
u32 len, bool do_panic, const char *name, bool dump_dbgbus_dpu,
- bool dump_dbgbus_vbif_rt, bool dump_all)
+ bool dump_dbgbus_vbif_rt)
{
int i;
- if (dump_all || !blk_arr || !len) {
- _dpu_dump_reg_all();
- } else {
+ if (!blk_arr || !len) {
for (i = 0; i < len; i++) {
if (blk_arr[i] != NULL)
_dpu_dump_reg_by_ranges(blk_arr[i],
@@ -2551,8 +2531,7 @@ static void _dpu_dump_work(struct work_struct *work)
ARRAY_SIZE(dpu_dbg_base.req_dump_blks),
dpu_dbg_base.work_panic, "dpudump_workitem",
dpu_dbg_base.dbgbus_dpu.cmn.include_in_deferred_work,
- dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work,
- dpu_dbg_base.dump_all);
+ dpu_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work);
}
void dpu_dbg_dump(bool queue_work, const char *name, ...)
@@ -2561,7 +2540,6 @@ void dpu_dbg_dump(bool queue_work, const char *name, ...)
bool do_panic = false;
bool dump_dbgbus_dpu = false;
bool dump_dbgbus_vbif_rt = false;
- bool dump_all = false;
va_list args;
char *blk_name = NULL;
struct dpu_dbg_reg_base *blk_base = NULL;
@@ -2576,7 +2554,6 @@ void dpu_dbg_dump(bool queue_work, const char *name, ...)
memset(dpu_dbg_base.req_dump_blks, 0,
sizeof(dpu_dbg_base.req_dump_blks));
- dpu_dbg_base.dump_all = false;
va_start(args, name);
while ((blk_name = va_arg(args, char*))) {
@@ -2594,9 +2571,6 @@ void dpu_dbg_dump(bool queue_work, const char *name, ...)
}
}
- if (!strcmp(blk_name, "all"))
- dump_all = true;
-
if (!strcmp(blk_name, "dbg_bus"))
dump_dbgbus_dpu = true;
@@ -2621,7 +2595,7 @@ void dpu_dbg_dump(bool queue_work, const char *name, ...)
schedule_work(&dpu_dbg_base.dump_work);
} else {
_dpu_dump_array(blk_arr, blk_len, do_panic, name,
- dump_dbgbus_dpu, dump_dbgbus_vbif_rt, dump_all);
+ dump_dbgbus_dpu, dump_dbgbus_vbif_rt);
}
}
--
Sean Paul, Software Engineer, Google / Chromium OS
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