On 30 May 2018 at 16:43, Georgi Djakov <georgi.djakov@xxxxxxxxxx> wrote:
> Now we have a proper implementation for the power irq handling and this
> quirk is not needed anymore. In fact, it is causing card detection delays
> on apq8096 platforms and the following error is displayed:
> sdhci_msm 74a4900.sdhci: mmc0: pwr_irq for req: (4) timed out
>
> The quirk is forcing the controller to retain 1.8V signalling on the slot
> even when a new card is inserted, which is not correct. The proper behavior
> would be to reset the controller in order to start with 3.3V signaling.
>
> Fixes: c0309b3803fe ("mmc: sdhci-msm: Add sdhci msm register write APIs which wait for pwr irq")
> Suggested-by: Vijay Viswanath <vviswana@xxxxxxxxxxxxxx>
> Signed-off-by: Georgi Djakov <georgi.djakov@xxxxxxxxxx>
Thanks, applied for next!
Kind regards
Uffe
> ---
> This can go for v4.18, as it's not a critical fix.
> Tested on db410c and db820c.
> ---
> drivers/mmc/host/sdhci-msm.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> index c283291db705..791779173332 100644
> --- a/drivers/mmc/host/sdhci-msm.c
> +++ b/drivers/mmc/host/sdhci-msm.c
> @@ -1333,7 +1333,6 @@ static const struct sdhci_ops sdhci_msm_ops = {
>
> static const struct sdhci_pltfm_data sdhci_msm_pdata = {
> .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
> - SDHCI_QUIRK_NO_CARD_NO_RESET |
> SDHCI_QUIRK_SINGLE_POWER_WRITE |
> SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
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