Hi Abhishek, On Thu, 3 May 2018 17:50:33 +0530, Abhishek Sahu <absahu@xxxxxxxxxxxxxx> wrote: > Following is the flow in the HW if controller tries to read erased > page Nit: ^ missing ':' > > 1. First ECC uncorrectable error will be generated from ECC engine > since ECC engine first calculates the ECC with all 0xff and match > the calculated ECC with ECC code in OOB (which is again all 0xff). > 2. After getting ECC error, erased CW detection logic will be > applied which is different for BCH and RS ECC > a. For BCH, HW checks if all the bytes in page are 0xff and then > it updates the status in separate register > NAND_ERASED_CW_DETECT_STATUS. > b. For RS ECC, the HW reports the same error when reading an > erased CW, but it notifies that it is an erased CW by > placing special characters at certain offsets in the > buffer. > > So the erased CW detect status should be checked only if ECC engine > generated the uncorrectable error. > > Currently for all other operational errors also (like TIMEOUT, MPU > errors, etc.), the erased CW detect logic is being applied so fix this > and return EIO for other operational errors. > > Signed-off-by: Abhishek Sahu <absahu@xxxxxxxxxxxxxx> > --- > * Changes from v1: > > 1. Added more detail in commit message > 2. Added comment before each if/else Thanks for that, it's much more ease to review :) > 3. Removed redundant check for BS_UNCORRECTABLE_BIT > > drivers/mtd/nand/raw/qcom_nandc.c | 65 ++++++++++++++++++++++++++------------- > 1 file changed, 43 insertions(+), 22 deletions(-) > Acked-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> Thanks, Miquèl -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
